| /linux/include/dt-bindings/clock/ |
| H A D | mediatek,mt6735-apmixedsys.h | 7 #define CLK_APMIXED_MAINPLL 1 macro
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| H A D | mt8135-clk.h | 110 #define CLK_APMIXED_MAINPLL 3 macro
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| H A D | mt7629-clk.h | 156 #define CLK_APMIXED_MAINPLL 1 macro
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| H A D | mt8516-clk.h | 14 #define CLK_APMIXED_MAINPLL 1 macro
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| H A D | mt7622-clk.h | 171 #define CLK_APMIXED_MAINPLL 1 macro
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| H A D | mt6797-clk.h | 108 #define CLK_APMIXED_MAINPLL 1 macro
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| H A D | mediatek,mt6795-clk.h | 142 #define CLK_APMIXED_MAINPLL 1 macro
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| H A D | mt6765-clk.h | 13 #define CLK_APMIXED_MAINPLL 3 macro
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| H A D | mt8173-clk.h | 158 #define CLK_APMIXED_MAINPLL 3 macro
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| H A D | mediatek,mt8365-clk.h | 232 #define CLK_APMIXED_MAINPLL 1 macro
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| H A D | mt6779-clk.h | 170 #define CLK_APMIXED_MAINPLL 5 macro
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| H A D | mt8183-clk.h | 14 #define CLK_APMIXED_MAINPLL 3 macro
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| H A D | mt2712-clk.h | 12 #define CLK_APMIXED_MAINPLL 0 macro
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| H A D | mt8186-clk.h | 267 #define CLK_APMIXED_MAINPLL 3 macro
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| H A D | mt2701-clk.h | 176 #define CLK_APMIXED_MAINPLL 2 macro
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| H A D | mt8192-clk.h | 301 #define CLK_APMIXED_MAINPLL 0 macro
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| H A D | mediatek,mt8196-clock.h | 145 #define CLK_APMIXED_MAINPLL 0 macro
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| H A D | mt8195-clk.h | 366 #define CLK_APMIXED_MAINPLL 7 macro
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt8195-apmixedsys.c | 75 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x01d0, 0x01e0, 0xff000000,
157 FH(CLK_APMIXED_MAINPLL, FH_MAINPLL, 0x104),
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| H A D | clk-mt8188-apmixedsys.c | 70 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x045C, 0x0468, 0xff000000,
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| H A D | clk-mt6735-apmixedsys.c | 70 …PLL(CLK_APMIXED_MAINPLL, "mainpll", MAINPLL_CON0, MAINPLL_PWR_CON0, 0xf0000101, CON0_RST_BAR, MAIN…
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| H A D | clk-mt2701.c | 941 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x210, 0x21c, 0xf0000000,
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| H A D | clk-mt6765.c | 710 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x023C, 0x0248, 0,
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