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Searched refs:CLK_APMIXED_APLL1 (Results 1 – 17 of 17) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt6735-apmixedsys.h13 #define CLK_APMIXED_APLL1 7 macro
H A Dmt8516-clk.h17 #define CLK_APMIXED_APLL1 4 macro
H A Dmt6797-clk.h116 #define CLK_APMIXED_APLL1 9 macro
H A Dmediatek,mt6795-clk.h150 #define CLK_APMIXED_APLL1 9 macro
H A Dmt6765-clk.h18 #define CLK_APMIXED_APLL1 8 macro
H A Dmt8173-clk.h166 #define CLK_APMIXED_APLL1 11 macro
H A Dmediatek,mt8365-clk.h237 #define CLK_APMIXED_APLL1 6 macro
H A Dmt6779-clk.h177 #define CLK_APMIXED_APLL1 12 macro
H A Dmt8183-clk.h20 #define CLK_APMIXED_APLL1 9 macro
H A Dmt2712-clk.h16 #define CLK_APMIXED_APLL1 4 macro
H A Dmt8186-clk.h276 #define CLK_APMIXED_APLL1 12 macro
H A Dmt8192-clk.h309 #define CLK_APMIXED_APLL1 8 macro
H A Dmt8195-clk.h375 #define CLK_APMIXED_APLL1 16 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8188-apmixedsys.c78 PLL(CLK_APMIXED_APLL1, "apll1", 0x0304, 0x0314, 0,
H A Dclk-mt6735-apmixedsys.c76 …PLL(CLK_APMIXED_APLL1, "apll1", APLL1_CON0, APLL1_PWR_CON0, 0x00000001, 0, APLL1_CON0, 4, APLL1_CO…
H A Dclk-mt8195-apmixedsys.c93 PLL(CLK_APMIXED_APLL1, "apll1", 0x07c0, 0x0dc0, 0,
H A Dclk-mt6765.c721 PLL(CLK_APMIXED_APLL1, "apll1", 0x028C, 0x029C, 0,