Searched refs:CLK1_CLK0_CURRENT_CNT (Results 1 – 6 of 6) sorted by relevance
48 uint32_t CLK1_CLK0_CURRENT_CNT; //dispclk member66 uint32_t CLK1_CLK0_CURRENT_CNT; //dispclk member85 uint32_t CLK1_CLK0_CURRENT_CNT; //dispclk member201 uint32_t CLK1_CLK0_CURRENT_CNT; //dispclk member
162 CLK_SR_DCN32(CLK1_CLK0_CURRENT_CNT), \241 uint32_t CLK1_CLK0_CURRENT_CNT; member
41 uint32_t CLK1_CLK0_CURRENT_CNT; /* DPREFCLK */ member
300 internal->CLK1_CLK0_CURRENT_CNT = REG_READ(CLK1_CLK0_CURRENT_CNT); in rn_dump_clk_registers_internal()319 regs_and_bypass->dispclk = internal.CLK1_CLK0_CURRENT_CNT / 10; in rn_dump_clk_registers()401 internal.CLK1_CLK0_CURRENT_CNT); in rn_dump_clk_registers()
232 internal->CLK1_CLK0_CURRENT_CNT = REG_READ(CLK1_0_CLK1_CLK0_CURRENT_CNT); in vg_dump_clk_registers_internal()251 regs_and_bypass->dispclk = internal.CLK1_CLK0_CURRENT_CNT / 10; in vg_dump_clk_registers()333 internal.CLK1_CLK0_CURRENT_CNT); in vg_dump_clk_registers()
530 dispclk_khz_reg = REG_READ(CLK1_CLK0_CURRENT_CNT); // DISPCLK in dcn32_auto_dpm_test_log()