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Searched refs:CGU_REG_CLKGR1 (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/clk/ingenic/
H A Djz4780-cgu.c30 #define CGU_REG_CLKGR1 0x28 macro
238 clkgr1 = readl(cgu->base + CGU_REG_CLKGR1); in jz4780_core1_enable()
240 writel(clkgr1, cgu->base + CGU_REG_CLKGR1); in jz4780_core1_enable()
409 .gate = { CGU_REG_CLKGR1, 2 },
509 .gate = { CGU_REG_CLKGR1, 3 },
518 .gate = { CGU_REG_CLKGR1, 4 },
527 .gate = { CGU_REG_CLKGR1, 9 },
718 .gate = { CGU_REG_CLKGR1, 0 },
724 .gate = { CGU_REG_CLKGR1, 1 },
730 .gate = { CGU_REG_CLKGR1, 5 },
[all …]
H A Djz4770-cgu.c26 #define CGU_REG_CLKGR1 0x28 macro
178 .gate = { CGU_REG_CLKGR1, 7 },
248 .gate = { CGU_REG_CLKGR1, 9 },
294 .gate = { CGU_REG_CLKGR1, 13 },
325 .gate = { CGU_REG_CLKGR1, 8 },
330 .gate = { CGU_REG_CLKGR1, 10 },
340 .gate = { CGU_REG_CLKGR1, 0 },
355 .gate = { CGU_REG_CLKGR1, 15 },
395 .gate = { CGU_REG_CLKGR1, 14 },
H A Dx1830-cgu.c24 #define CGU_REG_CLKGR1 0x28 macro
231 .gate = { CGU_REG_CLKGR1, 15 },
268 .gate = { CGU_REG_CLKGR1, 14 },
290 .gate = { CGU_REG_CLKGR1, 4 },
299 .gate = { CGU_REG_CLKGR1, 9 },
439 .gate = { CGU_REG_CLKGR1, 1 },
445 .gate = { CGU_REG_CLKGR1, 11 },
H A Djz4760-cgu.c30 #define CGU_REG_CLKGR1 0x28 macro
226 .gate = { CGU_REG_CLKGR1, 9 },
262 .gate = { CGU_REG_CLKGR1, 8 },
332 .gate = { CGU_REG_CLKGR1, 0 },