/linux/drivers/clk/ingenic/ |
H A D | jz4755-cgu.c | 140 "udc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 148 "lcd", CGU_CLK_DIV | CGU_CLK_GATE, 168 "spi", CGU_CLK_DIV | CGU_CLK_GATE, 175 "tve", CGU_CLK_MUX | CGU_CLK_GATE, 182 "rtc", CGU_CLK_MUX | CGU_CLK_GATE, 189 "cim", CGU_CLK_DIV | CGU_CLK_GATE, 198 "uart0", CGU_CLK_GATE, 204 "uart1", CGU_CLK_GATE, 210 "uart2", CGU_CLK_GATE, 216 "adc", CGU_CLK_GATE, [all …]
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H A D | jz4770-cgu.c | 172 "h1clk", CGU_CLK_DIV | CGU_CLK_GATE, 189 "c1clk", CGU_CLK_DIV | CGU_CLK_GATE, 209 "mmc0_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 216 "mmc1_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 223 "mmc2_mux", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 230 "cim", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 237 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 244 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 251 "bch", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 258 "lpclk", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, [all …]
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H A D | jz4780-cgu.c | 404 "vpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 448 "msc0", CGU_CLK_DIV | CGU_CLK_GATE, 455 "msc1", CGU_CLK_DIV | CGU_CLK_GATE, 462 "msc2", CGU_CLK_DIV | CGU_CLK_GATE, 469 "uhc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 506 "pcm", CGU_CLK_MUX | CGU_CLK_GATE, 513 "gpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 522 "hdmi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 531 "bch", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 546 "rtc_ercs", CGU_CLK_MUX | CGU_CLK_GATE, [all …]
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H A D | jz4760-cgu.c | 215 "uhc", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 222 "gpu", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 235 "tve", CGU_CLK_GATE | CGU_CLK_MUX, 241 "lpclk", CGU_CLK_GATE | CGU_CLK_MUX, 247 "gps", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 257 "pcm", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 272 "usb", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 296 "cim", CGU_CLK_DIV | CGU_CLK_GATE, 305 "ssi0", CGU_CLK_GATE, 310 "ssi1", CGU_CLK_GATE, [all …]
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H A D | x1830-cgu.c | 227 "cpu", CGU_CLK_DIV | CGU_CLK_GATE, 265 "pclk", CGU_CLK_DIV | CGU_CLK_GATE, 272 "ddr", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 285 "mac", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 294 "lcd", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 310 "msc0", CGU_CLK_DIV | CGU_CLK_GATE, 317 "msc1", CGU_CLK_DIV | CGU_CLK_GATE, 350 "rtc_ercs", CGU_CLK_MUX | CGU_CLK_GATE, 359 "emc", CGU_CLK_GATE, 365 "efuse", CGU_CLK_GATE, [all …]
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H A D | jz4740-cgu.c | 150 "lcd", CGU_CLK_DIV | CGU_CLK_GATE, 166 "i2s", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 174 "spi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 182 "mmc", CGU_CLK_DIV | CGU_CLK_GATE, 189 "uhc", CGU_CLK_DIV | CGU_CLK_GATE, 196 "udc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 206 "uart0", CGU_CLK_GATE, 212 "uart1", CGU_CLK_GATE, 218 "dma", CGU_CLK_GATE, 224 "ipu", CGU_CLK_GATE, [all …]
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H A D | x1000-cgu.c | 286 "cpu", CGU_CLK_DIV | CGU_CLK_GATE, 328 "pclk", CGU_CLK_DIV | CGU_CLK_GATE, 335 "ddr", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 348 "mac", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 387 "lcd", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 401 "msc0", CGU_CLK_DIV | CGU_CLK_GATE, 408 "msc1", CGU_CLK_DIV | CGU_CLK_GATE, 415 "otg", CGU_CLK_DIV | CGU_CLK_GATE | CGU_CLK_MUX, 448 "rtc_ercs", CGU_CLK_MUX | CGU_CLK_GATE, 457 "emc", CGU_CLK_GATE, [all …]
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H A D | jz4725b-cgu.c | 135 "ipu", CGU_CLK_DIV | CGU_CLK_GATE, 145 "lcd", CGU_CLK_DIV | CGU_CLK_GATE, 159 "spi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE, 182 "uart", CGU_CLK_GATE, 188 "dma", CGU_CLK_GATE, 194 "adc", CGU_CLK_GATE, 200 "i2c", CGU_CLK_GATE, 206 "aic", CGU_CLK_GATE, 212 "mmc0", CGU_CLK_GATE, 218 "mmc1", CGU_CLK_GATE, [all …]
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H A D | cgu.h | 164 CGU_CLK_GATE = BIT(2), enumerator
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H A D | cgu.c | 584 if (clk_info->type & CGU_CLK_GATE) { in ingenic_clk_enable() 604 if (clk_info->type & CGU_CLK_GATE) { in ingenic_clk_disable() 619 if (clk_info->type & CGU_CLK_GATE) in ingenic_clk_is_enabled() 752 caps &= ~(CGU_CLK_GATE | CGU_CLK_FIXDIV); in ingenic_register_clock()
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