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Searched refs:BLKADDR_RVUM (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/crypto/marvell/octeontx2/
H A Dotx2_cptpf_main.c26 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
28 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
33 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
40 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
52 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
54 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
57 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
64 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
75 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_VFFLR_INTX(0), in cptpf_enable_vf_flr_me_intrs()
79 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vf_flr_me_intrs()
[all …]
H A Dotx2_cptvf_main.c16 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, OTX2_RVU_VF_INT, in cptvf_enable_pfvf_mbox_intrs()
20 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, in cptvf_enable_pfvf_mbox_intrs()
27 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, in cptvf_disable_pfvf_mbox_intrs()
31 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, OTX2_RVU_VF_INT, in cptvf_disable_pfvf_mbox_intrs()
H A Dotx2_cptvf_mbox.c56 intr = otx2_cpt_read64(cptvf->reg_base, BLKADDR_RVUM, 0, in otx2_cptvf_pfvf_mbox_intr()
63 otx2_cpt_write64(cptvf->reg_base, BLKADDR_RVUM, 0, in otx2_cptvf_pfvf_mbox_intr()
H A Dotx2_cptpf_mbox.c358 intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, in otx2_cptpf_vfpf_mbox_intr()
367 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, in otx2_cptpf_vfpf_mbox_intr()
431 intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT); in otx2_cptpf_afpf_mbox_intr()
448 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT, in otx2_cptpf_afpf_mbox_intr()
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu.c306 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr()
314 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr()
322 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr()
330 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr()
400 rvu_write64(rvu, BLKADDR_RVUM, reg | (devnum << 16), num_lfs); in rvu_update_rsrc_map()
413 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_get_pf_numvfs()
429 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_get_hwvf()
457 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in is_pf_func_valid()
469 if (blkaddr < BLKADDR_RVUM || blkaddr >= BLK_COUNT) in is_block_implemented()
494 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_rvum_blk_revid()
[all …]
H A Drvu_cn10k.c71 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_REQ, iova); in rvu_get_lmtaddr()
75 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TXN_REQ, val); in rvu_get_lmtaddr()
77 err = rvu_poll_reg(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS, BIT_ULL(0), false); in rvu_get_lmtaddr()
82 val = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS); in rvu_get_lmtaddr()
91 pa = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TLN_FLIT0) >> 18; in rvu_get_lmtaddr()
H A Drvu_struct.h18 BLKADDR_RVUM = 0x0ULL, enumerator
H A Drvu_nix.c3595 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in nix_setup_mce_tables()