Lines Matching refs:BLKADDR_RVUM
306 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr()
314 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr()
322 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr()
330 cfg = rvu_read64(rvu, BLKADDR_RVUM, reg | (devnum << 16)); in rvu_get_blkaddr()
400 rvu_write64(rvu, BLKADDR_RVUM, reg | (devnum << 16), num_lfs); in rvu_update_rsrc_map()
408 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_get_pf_numvfs()
424 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_get_hwvf()
452 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in is_pf_func_valid()
464 if (blkaddr < BLKADDR_RVUM || blkaddr >= BLK_COUNT) in is_block_implemented()
489 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_rvum_blk_revid()
496 rvu_write64(rvu, BLKADDR_RVUM, in rvu_clear_rvum_blk_revid()
610 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_setup_msix_resources()
619 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_MSIX_CFG(pf)); in rvu_setup_msix_resources()
644 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_INT_CFG(pf)); in rvu_setup_msix_resources()
648 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
655 cfg = rvu_read64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
675 cfg = rvu_read64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
680 rvu_write64(rvu, BLKADDR_RVUM, in rvu_setup_msix_resources()
690 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST); in rvu_setup_msix_resources()
695 phy_addr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE); in rvu_setup_msix_resources()
704 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE, (u64)iova); in rvu_setup_msix_resources()
714 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_MSIXTR_BASE, in rvu_reset_msix()
750 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST); in rvu_free_hw_resources()
935 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_CONST); in rvu_setup_hw_resources()
1346 for (blkaddr = BLKADDR_RVUM; blkaddr < BLK_COUNT; blkaddr++) { in rvu_get_blkaddr_from_slot()
2008 cfg = rvu_read64(rvu, BLKADDR_RVUM, in rvu_mbox_handler_vf_flr()
2408 bar4 = rvu_read64(rvu, BLKADDR_RVUM, in rvu_get_mbox_regions()
2432 bar4 = rvu_read64(rvu, BLKADDR_RVUM, in rvu_get_mbox_regions()
2435 bar4 = rvu_read64(rvu, BLKADDR_RVUM, in rvu_get_mbox_regions()
2487 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(i)); in rvu_mbox_init()
2666 intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT); in rvu_mbox_pf_intr_handler()
2668 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT, intr); in rvu_mbox_pf_intr_handler()
2718 rvu_write64(rvu, BLKADDR_RVUM, in rvu_enable_mbox_intr()
2722 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT_ENA_W1S, in rvu_enable_mbox_intr()
2832 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_flr_handler()
2842 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFTRPEND, BIT_ULL(pf)); in rvu_flr_handler()
2845 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1S, BIT_ULL(pf)); in rvu_flr_handler()
2878 intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT); in rvu_flr_intr_handler()
2885 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT, in rvu_flr_intr_handler()
2888 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1C, in rvu_flr_intr_handler()
2927 intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT); in rvu_me_vf_intr_handler()
2945 intr = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT); in rvu_me_pf_intr_handler()
2953 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFTRPEND, in rvu_me_pf_intr_handler()
2956 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT, in rvu_me_pf_intr_handler()
2972 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFAF_MBOX_INT_ENA_W1C, in rvu_unregister_interrupts()
2978 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1C, in rvu_unregister_interrupts()
2982 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT_ENA_W1C, in rvu_unregister_interrupts()
3002 offset = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_INT_CFG(0)) & 0x3ff; in rvu_afvf_msix_vectors_num_ok()
3085 rvu_write64(rvu, BLKADDR_RVUM, in rvu_register_interrupts()
3088 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFFLR_INT_ENA_W1S, in rvu_register_interrupts()
3105 rvu_write64(rvu, BLKADDR_RVUM, in rvu_register_interrupts()
3108 rvu_write64(rvu, BLKADDR_RVUM, in rvu_register_interrupts()
3111 rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_PFME_INT_ENA_W1S, in rvu_register_interrupts()
3118 pf_vec_start = rvu_read64(rvu, BLKADDR_RVUM, in rvu_register_interrupts()
3232 cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf)); in rvu_flr_init()
3233 rvu_write64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(pf), in rvu_flr_init()