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Searched refs:BIT8 (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/staging/rtl8723bs/include/
H A Drtl8723b_spec.h206 #define IMR_CPWM_8723B BIT8 /* CPU power Mode exchange INT Status, Write 1 clear */
235 #define IMR_RXFOVW_8723B BIT8 /* Receive FIFO Overflow */
H A Dhal_com_reg.h226 #define RRSR_24M BIT8
288 #define RCR_ACRC32 BIT8 /* Accept CRC32 error packet */
/linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h39 #define BIT8 0x00000100 macro
/linux/include/uapi/linux/
H A Dsynclink.h27 #define BIT8 0x0100 macro
/linux/drivers/scsi/
H A Ddc395x.h68 #define BIT8 0x00000100 macro
/linux/drivers/staging/rtl8723bs/hal/
H A Dodm.h373 ODM_BB_PWR_TRAIN = BIT8,
399 ODM_RTL8723B = BIT8,
H A Dodm_DIG.c22 …PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_NHM_TH9_TH10_11N, BIT10|BIT9|BIT8, 0x7); /* 0x890[9:8]=3 … in odm_NHMCounterStatisticsInit()
/linux/drivers/gpu/drm/bridge/
H A Dite-it6263.c49 #define BIT8 FIELD_PREP(REG_COL_DEP, 1) macro
447 regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, REG_COL_DEP, BIT8); in it6263_lvds_set_interface()
/linux/drivers/tty/
H A Dsynclink_gt.c388 #define IRQ_RXOVER BIT8
2284 if (gsr & (BIT8 << i)) in slgt_interrupt()
4034 val |= BIT8; in async_mode()
4074 val |= BIT8; in async_mode()
4123 if ((rd_reg32(info, JCR) & BIT8) && info->params.data_rate && in async_mode()
4196 case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break; in sync_mode()
4269 case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break; in sync_mode()
4913 if (!(*(src+1) & (BIT9 + BIT8))) { in loopback_test_rx()
/linux/drivers/scsi/lpfc/
H A Dlpfc_hw4.h775 #define LPFC_SLI4_INTR8 BIT8