| /linux/drivers/scsi/ |
| H A D | dc395x.h | 71 #define BIT5 0x00000020 macro
134 #define SRB_ERROR BIT5
139 #define RESIDUAL_VALID BIT5
170 #define EN_TAG_QUEUEING BIT5
597 #define LUN_CHECK BIT5
|
| /linux/drivers/staging/rtl8723bs/include/ |
| H A D | hal_pwr_seq.h | |
| H A D | rtl8723b_spec.h | |
| H A D | hal_com_reg.h | |
| /linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/ |
| H A D | pwrseq.h | 262 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5 \
383 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0 \
416 PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT5|BIT4), (BIT5|BIT4) \
466 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5 \
619 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5 \
|
| /linux/drivers/video/fbdev/via/ |
| H A D | dvi.c | 62 BIT5 + BIT6 + BIT7); in viafb_tmds_trasmitter_identify()
66 viafb_write_reg_mask(SR3E, VIASR, 0x0, BIT5); in viafb_tmds_trasmitter_identify()
396 viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + BIT5); in viafb_dvi_enable()
408 viafb_write_reg_mask(CR93, VIACR, 0x21, BIT0 + BIT5); in viafb_dvi_enable()
|
| H A D | hw.c | 1696 viafb_write_reg_mask(SR01, VIASR, 0x20, BIT5); in device_screen_off()
1702 viafb_write_reg_mask(SR01, VIASR, 0x00, BIT5); in device_screen_on()
1713 viafb_write_reg_mask(CRD2, VIACR, 0x20, BIT4 + BIT5); in set_display_channel()
1717 viafb_write_reg_mask(CRD2, VIACR, 0x10, BIT4 + BIT5); in set_display_channel()
1720 viafb_write_reg_mask(CRD2, VIACR, 0x30, BIT4 + BIT5); in set_display_channel()
1725 viafb_write_reg_mask(CRD2, VIACR, 0x20, BIT4 + BIT5); in set_display_channel()
1728 viafb_write_reg_mask(CRD2, VIACR, 0x00, BIT4 + BIT5); in set_display_channel()
2065 p_gfx_dpa_setting->DVP0DataDri_S1, BIT5); in viafb_set_dpa_gfx()
|
| H A D | share.h | 19 #define BIT5 0x20 macro
|
| H A D | viafbdev.c | 1114 (viafb_read_reg(VIASR, SR2A) & BIT5) >> 4 | in viafb_dvp0_proc_show()
1156 reg_val << 4, BIT5); in viafb_dvp0_proc_write()
|
| /linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/ |
| H A D | halbt_precomp.h | 36 #define BIT5 0x00000020 macro
|
| H A D | halbtc8821a2ant.h | 10 #define BT_INFO_8821A_2ANT_B_HID BIT5
|
| H A D | halbtc8192e2ant.h | 9 #define BT_INFO_8192E_2ANT_B_HID BIT5
|
| H A D | halbtc8821a1ant.h | 10 #define BT_INFO_8821A_1ANT_B_HID BIT5
|
| H A D | halbtc8723b2ant.h | 12 #define BT_INFO_8723B_2ANT_B_HID BIT5
|
| H A D | halbtc8821a1ant.c | 833 if (byte1 & BIT4 && !(byte1 & BIT5)) { in btc8821a1ant_set_fw_ps_tdma()
837 real_byte1 |= BIT5; in btc8821a1ant_set_fw_ps_tdma()
839 real_byte5 |= BIT5; in btc8821a1ant_set_fw_ps_tdma()
|
| /linux/drivers/staging/rtl8723bs/hal/ |
| H A D | HalBtc8723b2Ant.h | |
| H A D | HalBtc8723b1Ant.h | |
| /linux/drivers/tty/ |
| H A D | synclink_gt.c | |
| /linux/include/uapi/linux/ |
| H A D | synclink.h | |
| /linux/lib/zstd/common/ |
| H A D | zstd_internal.h | 67 #define BIT5 32 macro
|
| /linux/drivers/staging/rtl8723bs/core/ |
| H A D | rtw_mlme.c | |