Searched refs:BIT15 (Results 1 – 6 of 6) sorted by relevance
201 #define IMR_HSISR_IND_ON_INT_8723B BIT15 /* HSISR Indicator (HSIMR & HSISR is true, this bit is …229 #define IMR_BCNDOK2_8723B BIT15 /* Beacon Queue DMA OK Interrupt 2 */
258 #define CAM_VALID BIT15
46 #define BIT15 0x00008000 macro
34 #define BIT15 0x8000 macro
61 #define BIT15 0x00008000 macro
191 #define desc_complete(a) (le16_to_cpu((a).status) & BIT15)2046 set_desc_status(info->rbufs[i], BIT15 | (reg >> 8)); in isr_rxdata()4121 val = BIT15 + BIT14 + BIT0; in async_mode()4173 val |= BIT15 + BIT13; in sync_mode()4176 case MGSL_MODE_BISYNC: val |= BIT15; break; in sync_mode()4248 val |= BIT15 + BIT13; in sync_mode()4251 case MGSL_MODE_BISYNC: val |= BIT15; break; in sync_mode()4357 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0); in sync_mode()