Searched refs:ASID (Results 1 – 16 of 16) sorted by relevance
| /linux/arch/arm/mm/ |
| H A D | tlb-v7.S | 41 asid r3, r3 @ mask ASID 50 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable) 79 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
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| H A D | tlb-v6.S | 43 asid r3, r3 @ mask ASID
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| H A D | Kconfig | 610 This indicates whether the CPU has the ASID register; used to
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| /linux/arch/arm/include/asm/ |
| H A D | mmu.h | 27 #define ASID(mm) ((unsigned int)((mm)->context.id.counter & ~ASID_MASK)) macro 29 #define ASID(mm) (0) macro
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| H A D | tlbflush.h | 363 const int asid = ASID(mm); in __local_flush_tlb_mm() 381 const int asid = ASID(mm); in local_flush_tlb_mm() 405 tlb_op(TLB_V7_UIS_ASID, "c8, c3, 2", ASID(mm)); in __flush_tlb_mm() 418 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __local_flush_tlb_page() 439 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in local_flush_tlb_page() 456 uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); in __flush_tlb_page()
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| /linux/arch/loongarch/include/asm/ |
| H A D | hw_breakpoint.h | 54 #define LOONGARCH_CSR_NAME_ASID ASID
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| /linux/Documentation/ABI/testing/ |
| H A D | debugfs-driver-habanalabs | 216 Description: Displays the hop values and physical address for a given ASID 217 and virtual address. The user should write the ASID and VA into 219 e.g. to display info about VA 0x1000 for ASID 1 you need to do: 323 address mappings per ASID and all user mappings of HW blocks
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| /linux/arch/arm64/include/asm/ |
| H A D | tlbflush.h | 234 * | ASID | TG | SCALE | NUM | TTL | BADDR | 335 * The 'mm' argument identifies the ASID to invalidate. 413 asid = __TLBI_VADDR(0, ASID(mm)); in flush_tlb_mm() 454 * @asid: The ASID of the task (0 for IPA instructions) 613 asid = ASID(mm); in __do_flush_tlb_range()
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| /linux/arch/arm/ |
| H A D | Kconfig | 650 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 654 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the 659 entries regardless of the ASID. 693 bool "ARM errata: possible faulty MMU translations following an ASID switch" 698 which starts prior to an ASID switch but completes afterwards. This 700 the new ASID. This workaround places two dsb instructions in the mm 701 switching code so that no page table walks can cross the ASID switch. 768 which sends an IPI to the CPUs that are running the same ASID
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| /linux/Documentation/translations/zh_TW/arch/loongarch/ |
| H A D | introduction.rst | 112 0x18 地址空間標識符 ASID
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| /linux/Documentation/translations/zh_CN/arch/loongarch/ |
| H A D | introduction.rst | 112 0x18 地址空间标识符 ASID
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| /linux/arch/arm64/ |
| H A D | Kconfig | 1240 contains data for a non-current ASID. The fix is to 1330 bool "Falkor E1003: Incorrect translation due to ASID change" 1333 On Falkor v1, an incorrect ASID may be cached in the TLB when ASID 1334 and BADDR are changed together in TTBRx_EL1. Since we keep the ASID 1743 zeroed area and reserved ASID. The user access routines
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| /linux/Documentation/arch/loongarch/ |
| H A D | introduction.rst | 115 0x18 Address Space Identifier ASID
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| /linux/tools/arch/x86/kcpuid/ |
| H A D | cpuid.csv | 854 0x8000000a, 0, ebx, 31:0, svm_nasid , Number of address space identifiers (ASID) 862 0x8000000a, 0, edx, 6, flushbyasid , Flush by ASID + Extended VMCB TLB_Control 1008 0x8000001f, 0, edx, 31:0, min_sev_asid_no_sev_es , Minimum ASID for SEV-enabled SEV-ES-disabled guest
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| /linux/Documentation/virt/kvm/x86/ |
| H A D | amd-memory-encryption.rst | 46 Hence, the ASID for the SEV-enabled guests must be from 1 to a maximum value
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| /linux/Documentation/admin-guide/ |
| H A D | kernel-parameters.txt | 3174 SEV-SNP ASID space is partitioned into separate SEV-ES 3175 and SEV-SNP ASID ranges, with the SEV-SNP range being 3181 adjusts the ASID ranges for SEV-ES and SEV-SNP guests.
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