1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2015, Linaro Limited
4 */
5 #ifndef __LINUX_ARM_SMCCC_H
6 #define __LINUX_ARM_SMCCC_H
7
8 #include <linux/args.h>
9 #include <linux/init.h>
10 #include <uapi/linux/const.h>
11
12 /*
13 * This file provides common defines for ARM SMC Calling Convention as
14 * specified in
15 * https://developer.arm.com/docs/den0028/latest
16 *
17 * This code is up-to-date with version DEN 0028 C
18 */
19
20 #define ARM_SMCCC_STD_CALL _AC(0,U)
21 #define ARM_SMCCC_FAST_CALL _AC(1,U)
22 #define ARM_SMCCC_TYPE_SHIFT 31
23
24 #define ARM_SMCCC_SMC_32 0
25 #define ARM_SMCCC_SMC_64 1
26 #define ARM_SMCCC_CALL_CONV_SHIFT 30
27
28 #define ARM_SMCCC_OWNER_MASK 0x3F
29 #define ARM_SMCCC_OWNER_SHIFT 24
30
31 #define ARM_SMCCC_FUNC_MASK 0xFFFF
32
33 #define ARM_SMCCC_IS_FAST_CALL(smc_val) \
34 ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT))
35 #define ARM_SMCCC_IS_64(smc_val) \
36 ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT))
37 #define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK)
38 #define ARM_SMCCC_OWNER_NUM(smc_val) \
39 (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK)
40
41 #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \
42 (((type) << ARM_SMCCC_TYPE_SHIFT) | \
43 ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \
44 (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \
45 ((func_num) & ARM_SMCCC_FUNC_MASK))
46
47 #define ARM_SMCCC_OWNER_ARCH 0
48 #define ARM_SMCCC_OWNER_CPU 1
49 #define ARM_SMCCC_OWNER_SIP 2
50 #define ARM_SMCCC_OWNER_OEM 3
51 #define ARM_SMCCC_OWNER_STANDARD 4
52 #define ARM_SMCCC_OWNER_STANDARD_HYP 5
53 #define ARM_SMCCC_OWNER_VENDOR_HYP 6
54 #define ARM_SMCCC_OWNER_TRUSTED_APP 48
55 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49
56 #define ARM_SMCCC_OWNER_TRUSTED_OS 50
57 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63
58
59 #define ARM_SMCCC_FUNC_QUERY_CALL_UID 0xff01
60
61 #define ARM_SMCCC_QUIRK_NONE 0
62 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */
63
64 #define ARM_SMCCC_VERSION_1_0 0x10000
65 #define ARM_SMCCC_VERSION_1_1 0x10001
66 #define ARM_SMCCC_VERSION_1_2 0x10002
67 #define ARM_SMCCC_VERSION_1_3 0x10003
68
69 #define ARM_SMCCC_1_3_SVE_HINT 0x10000
70 #define ARM_SMCCC_CALL_HINTS ARM_SMCCC_1_3_SVE_HINT
71
72
73 #define ARM_SMCCC_VERSION_FUNC_ID \
74 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
75 ARM_SMCCC_SMC_32, \
76 0, 0)
77
78 #define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \
79 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
80 ARM_SMCCC_SMC_32, \
81 0, 1)
82
83 #define ARM_SMCCC_ARCH_SOC_ID \
84 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
85 ARM_SMCCC_SMC_32, \
86 0, 2)
87
88 #define ARM_SMCCC_ARCH_WORKAROUND_1 \
89 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
90 ARM_SMCCC_SMC_32, \
91 0, 0x8000)
92
93 #define ARM_SMCCC_ARCH_WORKAROUND_2 \
94 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
95 ARM_SMCCC_SMC_32, \
96 0, 0x7fff)
97
98 #define ARM_SMCCC_ARCH_WORKAROUND_3 \
99 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
100 ARM_SMCCC_SMC_32, \
101 0, 0x3fff)
102
103 #define ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID \
104 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
105 ARM_SMCCC_SMC_32, \
106 ARM_SMCCC_OWNER_VENDOR_HYP, \
107 ARM_SMCCC_FUNC_QUERY_CALL_UID)
108
109 /* KVM UID value: 28b46fb6-2ec5-11e9-a9ca-4b564d003a74 */
110 #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_0 0xb66fb428U
111 #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_1 0xe911c52eU
112 #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_2 0x564bcaa9U
113 #define ARM_SMCCC_VENDOR_HYP_UID_KVM_REG_3 0x743a004dU
114
115 /* KVM "vendor specific" services */
116 #define ARM_SMCCC_KVM_FUNC_FEATURES 0
117 #define ARM_SMCCC_KVM_FUNC_PTP 1
118 /* Start of pKVM hypercall range */
119 #define ARM_SMCCC_KVM_FUNC_HYP_MEMINFO 2
120 #define ARM_SMCCC_KVM_FUNC_MEM_SHARE 3
121 #define ARM_SMCCC_KVM_FUNC_MEM_UNSHARE 4
122 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_5 5
123 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_6 6
124 #define ARM_SMCCC_KVM_FUNC_MMIO_GUARD 7
125 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_8 8
126 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_9 9
127 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_10 10
128 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_11 11
129 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_12 12
130 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_13 13
131 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_14 14
132 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_15 15
133 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_16 16
134 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_17 17
135 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_18 18
136 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_19 19
137 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_20 20
138 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_21 21
139 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_22 22
140 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_23 23
141 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_24 24
142 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_25 25
143 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_26 26
144 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_27 27
145 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_28 28
146 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_29 29
147 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_30 30
148 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_31 31
149 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_32 32
150 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_33 33
151 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_34 34
152 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_35 35
153 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_36 36
154 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_37 37
155 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_38 38
156 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_39 39
157 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_40 40
158 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_41 41
159 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_42 42
160 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_43 43
161 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_44 44
162 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_45 45
163 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_46 46
164 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_47 47
165 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_48 48
166 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_49 49
167 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_50 50
168 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_51 51
169 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_52 52
170 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_53 53
171 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_54 54
172 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_55 55
173 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_56 56
174 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_57 57
175 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_58 58
176 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_59 59
177 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_60 60
178 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_61 61
179 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_62 62
180 #define ARM_SMCCC_KVM_FUNC_PKVM_RESV_63 63
181 /* End of pKVM hypercall range */
182 #define ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_VER 64
183 #define ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_CPUS 65
184
185 #define ARM_SMCCC_KVM_FUNC_FEATURES_2 127
186 #define ARM_SMCCC_KVM_NUM_FUNCS 128
187
188 #define ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID \
189 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
190 ARM_SMCCC_SMC_32, \
191 ARM_SMCCC_OWNER_VENDOR_HYP, \
192 ARM_SMCCC_KVM_FUNC_FEATURES)
193
194 #define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED 1
195
196 /*
197 * ptp_kvm is a feature used for time sync between vm and host.
198 * ptp_kvm module in guest kernel will get service from host using
199 * this hypercall ID.
200 */
201 #define ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID \
202 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
203 ARM_SMCCC_SMC_32, \
204 ARM_SMCCC_OWNER_VENDOR_HYP, \
205 ARM_SMCCC_KVM_FUNC_PTP)
206
207 #define ARM_SMCCC_VENDOR_HYP_KVM_HYP_MEMINFO_FUNC_ID \
208 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
209 ARM_SMCCC_SMC_64, \
210 ARM_SMCCC_OWNER_VENDOR_HYP, \
211 ARM_SMCCC_KVM_FUNC_HYP_MEMINFO)
212
213 #define ARM_SMCCC_VENDOR_HYP_KVM_MEM_SHARE_FUNC_ID \
214 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
215 ARM_SMCCC_SMC_64, \
216 ARM_SMCCC_OWNER_VENDOR_HYP, \
217 ARM_SMCCC_KVM_FUNC_MEM_SHARE)
218
219 #define ARM_SMCCC_VENDOR_HYP_KVM_MEM_UNSHARE_FUNC_ID \
220 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
221 ARM_SMCCC_SMC_64, \
222 ARM_SMCCC_OWNER_VENDOR_HYP, \
223 ARM_SMCCC_KVM_FUNC_MEM_UNSHARE)
224
225 #define ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_FUNC_ID \
226 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
227 ARM_SMCCC_SMC_64, \
228 ARM_SMCCC_OWNER_VENDOR_HYP, \
229 ARM_SMCCC_KVM_FUNC_MMIO_GUARD)
230
231 #define ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_VER_FUNC_ID \
232 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
233 ARM_SMCCC_SMC_64, \
234 ARM_SMCCC_OWNER_VENDOR_HYP, \
235 ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_VER)
236
237 #define ARM_SMCCC_VENDOR_HYP_KVM_DISCOVER_IMPL_CPUS_FUNC_ID \
238 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
239 ARM_SMCCC_SMC_64, \
240 ARM_SMCCC_OWNER_VENDOR_HYP, \
241 ARM_SMCCC_KVM_FUNC_DISCOVER_IMPL_CPUS)
242
243 /* ptp_kvm counter type ID */
244 #define KVM_PTP_VIRT_COUNTER 0
245 #define KVM_PTP_PHYS_COUNTER 1
246
247 /* Paravirtualised time calls (defined by ARM DEN0057A) */
248 #define ARM_SMCCC_HV_PV_TIME_FEATURES \
249 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
250 ARM_SMCCC_SMC_64, \
251 ARM_SMCCC_OWNER_STANDARD_HYP, \
252 0x20)
253
254 #define ARM_SMCCC_HV_PV_TIME_ST \
255 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
256 ARM_SMCCC_SMC_64, \
257 ARM_SMCCC_OWNER_STANDARD_HYP, \
258 0x21)
259
260 /* TRNG entropy source calls (defined by ARM DEN0098) */
261 #define ARM_SMCCC_TRNG_VERSION \
262 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
263 ARM_SMCCC_SMC_32, \
264 ARM_SMCCC_OWNER_STANDARD, \
265 0x50)
266
267 #define ARM_SMCCC_TRNG_FEATURES \
268 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
269 ARM_SMCCC_SMC_32, \
270 ARM_SMCCC_OWNER_STANDARD, \
271 0x51)
272
273 #define ARM_SMCCC_TRNG_GET_UUID \
274 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
275 ARM_SMCCC_SMC_32, \
276 ARM_SMCCC_OWNER_STANDARD, \
277 0x52)
278
279 #define ARM_SMCCC_TRNG_RND32 \
280 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
281 ARM_SMCCC_SMC_32, \
282 ARM_SMCCC_OWNER_STANDARD, \
283 0x53)
284
285 #define ARM_SMCCC_TRNG_RND64 \
286 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
287 ARM_SMCCC_SMC_64, \
288 ARM_SMCCC_OWNER_STANDARD, \
289 0x53)
290
291 /*
292 * Return codes defined in ARM DEN 0070A
293 * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C
294 */
295 #define SMCCC_RET_SUCCESS 0
296 #define SMCCC_RET_NOT_SUPPORTED -1
297 #define SMCCC_RET_NOT_REQUIRED -2
298 #define SMCCC_RET_INVALID_PARAMETER -3
299
300 #ifndef __ASSEMBLY__
301
302 #include <linux/linkage.h>
303 #include <linux/types.h>
304
305 enum arm_smccc_conduit {
306 SMCCC_CONDUIT_NONE,
307 SMCCC_CONDUIT_SMC,
308 SMCCC_CONDUIT_HVC,
309 };
310
311 /**
312 * arm_smccc_1_1_get_conduit()
313 *
314 * Returns the conduit to be used for SMCCCv1.1 or later.
315 *
316 * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE.
317 */
318 enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void);
319
320 /**
321 * arm_smccc_get_version()
322 *
323 * Returns the version to be used for SMCCCv1.1 or later.
324 *
325 * When SMCCCv1.1 or above is not present, returns SMCCCv1.0, but this
326 * does not imply the presence of firmware or a valid conduit. Caller
327 * handling SMCCCv1.0 must determine the conduit by other means.
328 */
329 u32 arm_smccc_get_version(void);
330
331 void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit);
332
333 /**
334 * arm_smccc_get_soc_id_version()
335 *
336 * Returns the SOC ID version.
337 *
338 * When ARM_SMCCC_ARCH_SOC_ID is not present, returns SMCCC_RET_NOT_SUPPORTED.
339 */
340 s32 arm_smccc_get_soc_id_version(void);
341
342 /**
343 * arm_smccc_get_soc_id_revision()
344 *
345 * Returns the SOC ID revision.
346 *
347 * When ARM_SMCCC_ARCH_SOC_ID is not present, returns SMCCC_RET_NOT_SUPPORTED.
348 */
349 s32 arm_smccc_get_soc_id_revision(void);
350
351 /**
352 * struct arm_smccc_res - Result from SMC/HVC call
353 * @a0-a3 result values from registers 0 to 3
354 */
355 struct arm_smccc_res {
356 unsigned long a0;
357 unsigned long a1;
358 unsigned long a2;
359 unsigned long a3;
360 };
361
362 #ifdef CONFIG_ARM64
363 /**
364 * struct arm_smccc_1_2_regs - Arguments for or Results from SMC/HVC call
365 * @a0-a17 argument values from registers 0 to 17
366 */
367 struct arm_smccc_1_2_regs {
368 unsigned long a0;
369 unsigned long a1;
370 unsigned long a2;
371 unsigned long a3;
372 unsigned long a4;
373 unsigned long a5;
374 unsigned long a6;
375 unsigned long a7;
376 unsigned long a8;
377 unsigned long a9;
378 unsigned long a10;
379 unsigned long a11;
380 unsigned long a12;
381 unsigned long a13;
382 unsigned long a14;
383 unsigned long a15;
384 unsigned long a16;
385 unsigned long a17;
386 };
387
388 /**
389 * arm_smccc_1_2_hvc() - make HVC calls
390 * @args: arguments passed via struct arm_smccc_1_2_regs
391 * @res: result values via struct arm_smccc_1_2_regs
392 *
393 * This function is used to make HVC calls following SMC Calling Convention
394 * v1.2 or above. The content of the supplied param are copied from the
395 * structure to registers prior to the HVC instruction. The return values
396 * are updated with the content from registers on return from the HVC
397 * instruction.
398 */
399 asmlinkage void arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
400 struct arm_smccc_1_2_regs *res);
401
402 /**
403 * arm_smccc_1_2_smc() - make SMC calls
404 * @args: arguments passed via struct arm_smccc_1_2_regs
405 * @res: result values via struct arm_smccc_1_2_regs
406 *
407 * This function is used to make SMC calls following SMC Calling Convention
408 * v1.2 or above. The content of the supplied param are copied from the
409 * structure to registers prior to the SMC instruction. The return values
410 * are updated with the content from registers on return from the SMC
411 * instruction.
412 */
413 asmlinkage void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args,
414 struct arm_smccc_1_2_regs *res);
415 #endif
416
417 /**
418 * struct arm_smccc_quirk - Contains quirk information
419 * @id: quirk identification
420 * @state: quirk specific information
421 * @a6: Qualcomm quirk entry for returning post-smc call contents of a6
422 */
423 struct arm_smccc_quirk {
424 int id;
425 union {
426 unsigned long a6;
427 } state;
428 };
429
430 /**
431 * __arm_smccc_smc() - make SMC calls
432 * @a0-a7: arguments passed in registers 0 to 7
433 * @res: result values from registers 0 to 3
434 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
435 *
436 * This function is used to make SMC calls following SMC Calling Convention.
437 * The content of the supplied param are copied to registers 0 to 7 prior
438 * to the SMC instruction. The return values are updated with the content
439 * from register 0 to 3 on return from the SMC instruction. An optional
440 * quirk structure provides vendor specific behavior.
441 */
442 #ifdef CONFIG_HAVE_ARM_SMCCC
443 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1,
444 unsigned long a2, unsigned long a3, unsigned long a4,
445 unsigned long a5, unsigned long a6, unsigned long a7,
446 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
447 #else
__arm_smccc_smc(unsigned long a0,unsigned long a1,unsigned long a2,unsigned long a3,unsigned long a4,unsigned long a5,unsigned long a6,unsigned long a7,struct arm_smccc_res * res,struct arm_smccc_quirk * quirk)448 static inline void __arm_smccc_smc(unsigned long a0, unsigned long a1,
449 unsigned long a2, unsigned long a3, unsigned long a4,
450 unsigned long a5, unsigned long a6, unsigned long a7,
451 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk)
452 {
453 *res = (struct arm_smccc_res){};
454 }
455 #endif
456
457 /**
458 * __arm_smccc_hvc() - make HVC calls
459 * @a0-a7: arguments passed in registers 0 to 7
460 * @res: result values from registers 0 to 3
461 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required.
462 *
463 * This function is used to make HVC calls following SMC Calling
464 * Convention. The content of the supplied param are copied to registers 0
465 * to 7 prior to the HVC instruction. The return values are updated with
466 * the content from register 0 to 3 on return from the HVC instruction. An
467 * optional quirk structure provides vendor specific behavior.
468 */
469 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
470 unsigned long a2, unsigned long a3, unsigned long a4,
471 unsigned long a5, unsigned long a6, unsigned long a7,
472 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk);
473
474 #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL)
475
476 #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__)
477
478 #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL)
479
480 #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__)
481
482 /* SMCCC v1.1 implementation madness follows */
483 #ifdef CONFIG_ARM64
484
485 #define SMCCC_SMC_INST "smc #0"
486 #define SMCCC_HVC_INST "hvc #0"
487
488 #elif defined(CONFIG_ARM)
489 #include <asm/opcodes-sec.h>
490 #include <asm/opcodes-virt.h>
491
492 #define SMCCC_SMC_INST __SMC(0)
493 #define SMCCC_HVC_INST __HVC(0)
494
495 #endif
496
497 #define __constraint_read_2 "r" (arg0)
498 #define __constraint_read_3 __constraint_read_2, "r" (arg1)
499 #define __constraint_read_4 __constraint_read_3, "r" (arg2)
500 #define __constraint_read_5 __constraint_read_4, "r" (arg3)
501 #define __constraint_read_6 __constraint_read_5, "r" (arg4)
502 #define __constraint_read_7 __constraint_read_6, "r" (arg5)
503 #define __constraint_read_8 __constraint_read_7, "r" (arg6)
504 #define __constraint_read_9 __constraint_read_8, "r" (arg7)
505
506 #define __declare_arg_2(a0, res) \
507 struct arm_smccc_res *___res = res; \
508 register unsigned long arg0 asm("r0") = (u32)a0
509
510 #define __declare_arg_3(a0, a1, res) \
511 typeof(a1) __a1 = a1; \
512 struct arm_smccc_res *___res = res; \
513 register unsigned long arg0 asm("r0") = (u32)a0; \
514 register typeof(a1) arg1 asm("r1") = __a1
515
516 #define __declare_arg_4(a0, a1, a2, res) \
517 typeof(a1) __a1 = a1; \
518 typeof(a2) __a2 = a2; \
519 struct arm_smccc_res *___res = res; \
520 register unsigned long arg0 asm("r0") = (u32)a0; \
521 register typeof(a1) arg1 asm("r1") = __a1; \
522 register typeof(a2) arg2 asm("r2") = __a2
523
524 #define __declare_arg_5(a0, a1, a2, a3, res) \
525 typeof(a1) __a1 = a1; \
526 typeof(a2) __a2 = a2; \
527 typeof(a3) __a3 = a3; \
528 struct arm_smccc_res *___res = res; \
529 register unsigned long arg0 asm("r0") = (u32)a0; \
530 register typeof(a1) arg1 asm("r1") = __a1; \
531 register typeof(a2) arg2 asm("r2") = __a2; \
532 register typeof(a3) arg3 asm("r3") = __a3
533
534 #define __declare_arg_6(a0, a1, a2, a3, a4, res) \
535 typeof(a4) __a4 = a4; \
536 __declare_arg_5(a0, a1, a2, a3, res); \
537 register typeof(a4) arg4 asm("r4") = __a4
538
539 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, res) \
540 typeof(a5) __a5 = a5; \
541 __declare_arg_6(a0, a1, a2, a3, a4, res); \
542 register typeof(a5) arg5 asm("r5") = __a5
543
544 #define __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res) \
545 typeof(a6) __a6 = a6; \
546 __declare_arg_7(a0, a1, a2, a3, a4, a5, res); \
547 register typeof(a6) arg6 asm("r6") = __a6
548
549 #define __declare_arg_9(a0, a1, a2, a3, a4, a5, a6, a7, res) \
550 typeof(a7) __a7 = a7; \
551 __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
552 register typeof(a7) arg7 asm("r7") = __a7
553
554 /*
555 * We have an output list that is not necessarily used, and GCC feels
556 * entitled to optimise the whole sequence away. "volatile" is what
557 * makes it stick.
558 */
559 #define __arm_smccc_1_1(inst, ...) \
560 do { \
561 register unsigned long r0 asm("r0"); \
562 register unsigned long r1 asm("r1"); \
563 register unsigned long r2 asm("r2"); \
564 register unsigned long r3 asm("r3"); \
565 CONCATENATE(__declare_arg_, \
566 COUNT_ARGS(__VA_ARGS__))(__VA_ARGS__); \
567 asm volatile(inst "\n" : \
568 "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \
569 : CONCATENATE(__constraint_read_, \
570 COUNT_ARGS(__VA_ARGS__)) \
571 : "memory"); \
572 if (___res) \
573 *___res = (typeof(*___res)){r0, r1, r2, r3}; \
574 } while (0)
575
576 /*
577 * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call
578 *
579 * This is a variadic macro taking one to eight source arguments, and
580 * an optional return structure.
581 *
582 * @a0-a7: arguments passed in registers 0 to 7
583 * @res: result values from registers 0 to 3
584 *
585 * This macro is used to make SMC calls following SMC Calling Convention v1.1.
586 * The content of the supplied param are copied to registers 0 to 7 prior
587 * to the SMC instruction. The return values are updated with the content
588 * from register 0 to 3 on return from the SMC instruction if not NULL.
589 */
590 #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
591
592 /*
593 * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call
594 *
595 * This is a variadic macro taking one to eight source arguments, and
596 * an optional return structure.
597 *
598 * @a0-a7: arguments passed in registers 0 to 7
599 * @res: result values from registers 0 to 3
600 *
601 * This macro is used to make HVC calls following SMC Calling Convention v1.1.
602 * The content of the supplied param are copied to registers 0 to 7 prior
603 * to the HVC instruction. The return values are updated with the content
604 * from register 0 to 3 on return from the HVC instruction if not NULL.
605 */
606 #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__)
607
608 /*
609 * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED.
610 * Used when the SMCCC conduit is not defined. The empty asm statement
611 * avoids compiler warnings about unused variables.
612 */
613 #define __fail_smccc_1_1(...) \
614 do { \
615 CONCATENATE(__declare_arg_, \
616 COUNT_ARGS(__VA_ARGS__))(__VA_ARGS__); \
617 asm ("" : \
618 : CONCATENATE(__constraint_read_, \
619 COUNT_ARGS(__VA_ARGS__)) \
620 : "memory"); \
621 if (___res) \
622 ___res->a0 = SMCCC_RET_NOT_SUPPORTED; \
623 } while (0)
624
625 /*
626 * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call
627 *
628 * This is a variadic macro taking one to eight source arguments, and
629 * an optional return structure.
630 *
631 * @a0-a7: arguments passed in registers 0 to 7
632 * @res: result values from registers 0 to 3
633 *
634 * This macro will make either an HVC call or an SMC call depending on the
635 * current SMCCC conduit. If no valid conduit is available then -1
636 * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied).
637 *
638 * The return value also provides the conduit that was used.
639 */
640 #define arm_smccc_1_1_invoke(...) ({ \
641 int method = arm_smccc_1_1_get_conduit(); \
642 switch (method) { \
643 case SMCCC_CONDUIT_HVC: \
644 arm_smccc_1_1_hvc(__VA_ARGS__); \
645 break; \
646 case SMCCC_CONDUIT_SMC: \
647 arm_smccc_1_1_smc(__VA_ARGS__); \
648 break; \
649 default: \
650 __fail_smccc_1_1(__VA_ARGS__); \
651 method = SMCCC_CONDUIT_NONE; \
652 break; \
653 } \
654 method; \
655 })
656
657 #ifdef CONFIG_ARM64
658
659 #define __fail_smccc_1_2(___res) \
660 do { \
661 if (___res) \
662 ___res->a0 = SMCCC_RET_NOT_SUPPORTED; \
663 } while (0)
664
665 /*
666 * arm_smccc_1_2_invoke() - make an SMCCC v1.2 compliant call
667 *
668 * @args: SMC args are in the a0..a17 fields of the arm_smcc_1_2_regs structure
669 * @res: result values from registers 0 to 17
670 *
671 * This macro will make either an HVC call or an SMC call depending on the
672 * current SMCCC conduit. If no valid conduit is available then -1
673 * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied).
674 *
675 * The return value also provides the conduit that was used.
676 */
677 #define arm_smccc_1_2_invoke(args, res) ({ \
678 struct arm_smccc_1_2_regs *__args = args; \
679 struct arm_smccc_1_2_regs *__res = res; \
680 int method = arm_smccc_1_1_get_conduit(); \
681 switch (method) { \
682 case SMCCC_CONDUIT_HVC: \
683 arm_smccc_1_2_hvc(__args, __res); \
684 break; \
685 case SMCCC_CONDUIT_SMC: \
686 arm_smccc_1_2_smc(__args, __res); \
687 break; \
688 default: \
689 __fail_smccc_1_2(__res); \
690 method = SMCCC_CONDUIT_NONE; \
691 break; \
692 } \
693 method; \
694 })
695 #endif /*CONFIG_ARM64*/
696
697 #endif /*__ASSEMBLY__*/
698 #endif /*__LINUX_ARM_SMCCC_H*/
699