Searched refs:APLL (Results 1 – 8 of 8) sorted by relevance
1 Binding for Texas Instruments APLL clock.4 register-mapped APLL with usually two selectable input clocks8 modes (locked, low power stop etc.) APLL mostly behaves like18 - reg : address and length of the register set for controlling the APLL.
14 #define APLL 2 macro
236 case APLL: in ma35d1_clk_pll_recalc_rate()271 case APLL: in ma35d1_clk_pll_determine_rate()
506 hws[APLL] = ma35d1_reg_clk_pll(dev, APLL, pllmode[2], "apll", in ma35d1_clocks_probe()
43 <&clk APLL>,
22 #define APLL 11 macro
295 .pll = DEF_PLL(APLL),