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Searched refs:AON_RESET (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/clk/qcom/
H A Dgdsc.h66 #define AON_RESET BIT(4) macro
H A Dgpucc-sdm845.c138 .flags = CLAMP_IO | AON_RESET | POLL_CFG_GDSCR,
H A Dgpucc-sm8250.c248 .flags = CLAMP_IO | AON_RESET | POLL_CFG_GDSCR,
H A Dgpucc-sm8150.c240 .flags = CLAMP_IO | AON_RESET | POLL_CFG_GDSCR,
H A Dgpucc-sdm660.c253 .flags = CLAMP_IO | SW_RESET | AON_RESET | NO_RET_PERIPH,
H A Dgpucc-msm8998.c269 .flags = CLAMP_IO | SW_RESET | AON_RESET | NO_RET_PERIPH,
H A Dgpucc-qcm2290.c320 .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR | CLAMP_IO | AON_RESET | SW_RESET,
H A Dgpucc-sm6375.c379 .flags = CLAMP_IO | SW_RESET | AON_RESET,
H A Dgpucc-sar2130p.c416 .flags = CLAMP_IO | AON_RESET | SW_RESET,
H A Dgpucc-sm8350.c527 .flags = CLAMP_IO | AON_RESET | POLL_CFG_GDSCR,
H A Dgpucc-x1e80100.c556 .flags = CLAMP_IO | AON_RESET | SW_RESET | POLL_CFG_GDSCR,
H A Dgpucc-sm8650.c564 .flags = CLAMP_IO | AON_RESET | SW_RESET | POLL_CFG_GDSCR,
H A Dgpucc-sa8775p.c584 .flags = AON_RESET | RETAIN_FF_ENABLE,
H A Dgpucc-sm4450.c693 .flags = CLAMP_IO | AON_RESET | SW_RESET | POLL_CFG_GDSCR,
H A Dgpucc-sm8450.c691 .flags = CLAMP_IO | AON_RESET | SW_RESET | POLL_CFG_GDSCR,
H A Dgdsc.c300 if (sc->flags & AON_RESET) in gdsc_enable()