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Searched refs:ADDR_SURF_BANK_WIDTH_2 (Results 1 – 25 of 32) sorted by relevance

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/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_8_2_enum.h959 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
H A Dgmc_8_1_enum.h1089 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
/linux/sound/soc/amd/include/
H A Dacp_2_2_enum.h959 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_5_1_enum.h959 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
H A Dbif_5_0_enum.h1089 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_enum.h959 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
H A Dsmu_7_1_0_enum.h1118 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
H A Dsmu_7_1_3_enum.h1173 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
H A Dsmu_7_1_2_enum.h1137 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
H A Dsmu_7_1_1_enum.h1119 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_6_0_enum.h972 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
H A Duvd_5_0_enum.h1102 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_enum.h1044 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
H A Ddce_10_0_enum.h1664 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c2199 mod2array[2] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v8_0_tiling_mode_table_init()
2227 mod2array[10] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v8_0_tiling_mode_table_init()
2231 mod2array[11] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v8_0_tiling_mode_table_init()
2797 mod2array[8] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v8_0_tiling_mode_table_init()
2802 mod2array[9] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v8_0_tiling_mode_table_init()
3182 mod2array[10] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v8_0_tiling_mode_table_init()
3186 mod2array[11] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v8_0_tiling_mode_table_init()
3359 mod2array[10] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v8_0_tiling_mode_table_init()
3363 mod2array[11] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v8_0_tiling_mode_table_init()
H A Dgfx_v7_0.c1147 macrotile[8] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v7_0_tiling_mode_table_init()
1151 macrotile[9] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v7_0_tiling_mode_table_init()
1508 macrotile[10] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v7_0_tiling_mode_table_init()
1512 macrotile[11] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in gfx_v7_0_tiling_mode_table_init()
H A Dsid.h1205 # define ADDR_SURF_BANK_WIDTH_2 1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_enum.h1254 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
H A Doss_3_0_1_enum.h1355 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
H A Doss_3_0_enum.h1388 ADDR_SURF_BANK_WIDTH_2 = 0x1, enumerator
/linux/drivers/gpu/drm/radeon/
H A Dsid.h1208 # define ADDR_SURF_BANK_WIDTH_2 1 macro
H A Dcik.c2832 macrotile[8] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in cik_tiling_mode_table_init()
2836 macrotile[9] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in cik_tiling_mode_table_init()
2947 macrotile[0] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in cik_tiling_mode_table_init()
2951 macrotile[1] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in cik_tiling_mode_table_init()
2983 macrotile[10] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in cik_tiling_mode_table_init()
2987 macrotile[11] = (BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in cik_tiling_mode_table_init()
H A Dcikd.h1262 # define ADDR_SURF_BANK_WIDTH_2 1 macro
H A Devergreend.h2219 # define ADDR_SURF_BANK_WIDTH_2 1 macro
H A Dsi.c2663 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in si_tiling_mode_table_init()
2878 BANK_WIDTH(ADDR_SURF_BANK_WIDTH_2) | in si_tiling_mode_table_init()

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