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/linux/include/linux/
H A Dlog2.h22 int __ilog2_u32(u32 n) in __ilog2_u32() argument
24 return fls(n) - 1; in __ilog2_u32()
30 int __ilog2_u64(u64 n) in __ilog2_u64() argument
32 return fls64(n) - 1; in __ilog2_u64()
45 bool is_power_of_2(unsigned long n) in is_power_of_2() argument
47 return (n != 0 && ((n & (n - 1)) == 0)); in is_power_of_2()
55 unsigned long __roundup_pow_of_two(unsigned long n) in __roundup_pow_of_two() argument
57 return 1UL << fls_long(n - 1); in __roundup_pow_of_two()
65 unsigned long __rounddown_pow_of_two(unsigned long n) in __rounddown_pow_of_two() argument
67 return 1UL << (fls_long(n) - 1); in __rounddown_pow_of_two()
[all …]
/linux/tools/include/linux/
H A Dlog2.h21 int __ilog2_u32(u32 n) in __ilog2_u32() argument
23 return fls(n) - 1; in __ilog2_u32()
27 int __ilog2_u64(u64 n) in __ilog2_u64() argument
29 return fls64(n) - 1; in __ilog2_u64()
38 bool is_power_of_2(unsigned long n) in is_power_of_2() argument
40 return (n != 0 && ((n & (n - 1)) == 0)); in is_power_of_2()
47 unsigned long __roundup_pow_of_two(unsigned long n) in __roundup_pow_of_two() argument
49 return 1UL << fls_long(n - 1); in __roundup_pow_of_two()
56 unsigned long __rounddown_pow_of_two(unsigned long n) in __rounddown_pow_of_two() argument
58 return 1UL << (fls_long(n) - 1); in __rounddown_pow_of_two()
[all …]
/linux/drivers/media/pci/solo6x10/
H A Dsolo6x10-regs.h34 #define SOLO_DMA_CTRL_REFRESH_CYCLE(n) ((n)<<8) argument
36 #define SOLO_DMA_CTRL_SDRAM_SIZE(n) ((n)<<6) argument
41 #define SOLO_DMA_CTRL_LATENCY(n) ((n)<<0) argument
49 #define SOLO_VCLK_SELECT(n) ((n)<<20) argument
50 #define SOLO_VCLK_VIN1415_DELAY(n) ((n)<<14) argument
51 #define SOLO_VCLK_VIN1213_DELAY(n) ((n)<<12) argument
52 #define SOLO_VCLK_VIN1011_DELAY(n) ((n)<<10) argument
53 #define SOLO_VCLK_VIN0809_DELAY(n) ((n)<<8) argument
54 #define SOLO_VCLK_VIN0607_DELAY(n) ((n)<<6) argument
55 #define SOLO_VCLK_VIN0405_DELAY(n) ((n)<<4) argument
[all …]
/linux/drivers/staging/media/starfive/camss/
H A Dstf-isp.h32 #define CSI_INTS(n) ((n) << 16) argument
33 #define CSI_SHA_M(n) ((n) << 0) argument
51 #define DVP_SYNC_POL(n) ((n) << 2) argument
52 #define ITU656_EN(n) ((n) << 1) argument
53 #define IMAGER_SEL(n) ((n) << 0) argument
56 #define SMY13(n) ((n) << 14) argument
57 #define SMY12(n) ((n) << 12) argument
58 #define SMY11(n) ((n) << 10) argument
59 #define SMY10(n) ((n) << 8) argument
60 #define SMY3(n) ((n) << 6) argument
[all …]
/linux/drivers/media/platform/nxp/imx8-isi/
H A Dimx8-isi-regs.h17 #define CHNL_CTRL_CHAIN_BUF(n) ((n) << 25) argument
22 #define CHNL_CTRL_BLANK_PXL(n) ((n) << 16) argument
24 #define CHNL_CTRL_MIPI_VC_ID(n) ((n) << 6) argument
26 #define CHNL_CTRL_SRC_TYPE(n) ((n) << 4) argument
30 #define CHNL_CTRL_SRC_INPUT(n) ((n) << 0) argument
35 #define CHNL_IMG_CTRL_FORMAT(n) ((n) << 24) argument
86 #define CHNL_IMG_CTRL_GBL_ALPHA_VAL(n) ((n) << 16) argument
89 #define CHNL_IMG_CTRL_DEINT(n) ((n) << 12) argument
97 #define CHNL_IMG_CTRL_DEC_X(n) ((n) << 10) argument
99 #define CHNL_IMG_CTRL_DEC_Y(n) ((n) << 8) argument
[all …]
/linux/sound/soc/uniphier/
H A Daio-reg.h17 #define A2CHNMAPCTR0(n) (0x00000 + 0x40 * (n)) argument
18 #define A2RBNMAPCTR0(n) (0x01000 + 0x40 * (n)) argument
19 #define A2IPORTNMAPCTR0(n) (0x02000 + 0x40 * (n)) argument
20 #define A2IPORTNMAPCTR1(n) (0x02004 + 0x40 * (n)) argument
21 #define A2IIFNMAPCTR0(n) (0x03000 + 0x40 * (n)) argument
22 #define A2OPORTNMAPCTR0(n) (0x04000 + 0x40 * (n)) argument
23 #define A2OPORTNMAPCTR1(n) (0x04004 + 0x40 * (n)) argument
24 #define A2OPORTNMAPCTR2(n) (0x04008 + 0x40 * (n)) argument
25 #define A2OIFNMAPCTR0(n) (0x05000 + 0x40 * (n)) argument
26 #define A2ATNMAPCTR0(n) (0x06000 + 0x40 * (n)) argument
[all …]
/linux/fs/smb/server/
H A Dndr.c12 static inline char *ndr_get_field(struct ndr *n) in ndr_get_field() argument
14 return n->data + n->offset; in ndr_get_field()
17 static int try_to_realloc_ndr_blob(struct ndr *n, size_t sz) in try_to_realloc_ndr_blob() argument
21 data = krealloc(n->data, n->offset + sz + 1024, KSMBD_DEFAULT_GFP); in try_to_realloc_ndr_blob()
25 n->data = data; in try_to_realloc_ndr_blob()
26 n->length += 1024; in try_to_realloc_ndr_blob()
27 memset(n->data + n->offset, 0, 1024); in try_to_realloc_ndr_blob()
31 static int ndr_write_int16(struct ndr *n, __u16 value) in ndr_write_int16() argument
33 if (n->length <= n->offset + sizeof(value)) { in ndr_write_int16()
36 ret = try_to_realloc_ndr_blob(n, sizeof(value)); in ndr_write_int16()
[all …]
/linux/drivers/media/cec/core/
H A Dcec-notifier.c54 struct cec_notifier *n; in cec_notifier_get_conn() local
57 list_for_each_entry(n, &cec_notifiers, head) { in cec_notifier_get_conn()
58 if (n->hdmi_dev == hdmi_dev && in cec_notifier_get_conn()
60 (n->port_name && !strcmp(n->port_name, port_name)))) { in cec_notifier_get_conn()
61 kref_get(&n->kref); in cec_notifier_get_conn()
63 return n; in cec_notifier_get_conn()
66 n = kzalloc(sizeof(*n), GFP_KERNEL); in cec_notifier_get_conn()
67 if (!n) in cec_notifier_get_conn()
69 n->hdmi_dev = hdmi_dev; in cec_notifier_get_conn()
71 n->port_name = kstrdup(port_name, GFP_KERNEL); in cec_notifier_get_conn()
[all …]
/linux/drivers/gpu/drm/rockchip/
H A Dinno_hdmi.h43 #define v_VIDEO_INPUT_FORMAT(n) (n << 1) argument
56 #define v_VIDEO_OUTPUT_COLOR(n) (((n) & 0x3) << 6) argument
57 #define v_VIDEO_INPUT_BITS(n) (n << 4) argument
58 #define v_VIDEO_INPUT_CSP(n) (n << 0) argument
68 #define v_VIDEO_AUTO_CSC(n) (n << 7) argument
70 #define v_VIDEO_C0_C2_SWAP(n) (n << 0) argument
83 #define v_COLOR_DEPTH_NOT_INDICATED(n) ((n) << 4) argument
96 #define v_AVMUTE_CLEAR(n) (n << 7) argument
97 #define v_AVMUTE_ENABLE(n) (n << 6) argument
98 #define v_AUDIO_MUTE(n) (n << 1) argument
[all …]
/linux/drivers/gpu/drm/exynos/
H A Dregs-decon5433.h12 #define DECON_WINCONx(n) (0x0020 + ((n) * 4)) argument
13 #define DECON_VIDOSDxH(n) (0x0080 + ((n) * 4)) argument
15 #define DECON_VIDOSDxA(n) (0x00B0 + ((n) * 0x20)) argument
16 #define DECON_VIDOSDxB(n) (0x00B4 + ((n) * 0x20)) argument
17 #define DECON_VIDOSDxC(n) (0x00B8 + ((n) * 0x20)) argument
18 #define DECON_VIDOSDxD(n) (0x00BC + ((n) * 0x20)) argument
19 #define DECON_VIDOSDxE(n) (0x00C0 + ((n) * 0x20)) argument
20 #define DECON_VIDW0xADD0B0(n) (0x0150 + ((n) * 0x10)) argument
21 #define DECON_VIDW0xADD0B1(n) (0x0154 + ((n) * 0x10)) argument
22 #define DECON_VIDW0xADD0B2(n) (0x0158 + ((n) * 0x10)) argument
[all …]
/linux/arch/mips/loongson32/common/
H A Dirq.c13 #define LS1X_INTC_REG(n, x) \ argument
14 ((void __iomem *)KSEG1ADDR(LS1X_INTC_BASE + (n * 0x18) + (x)))
16 #define LS1X_INTC_INTISR(n) LS1X_INTC_REG(n, 0x0) argument
17 #define LS1X_INTC_INTIEN(n) LS1X_INTC_REG(n, 0x4) argument
18 #define LS1X_INTC_INTSET(n) LS1X_INTC_REG(n, 0x8) argument
19 #define LS1X_INTC_INTCLR(n) LS1X_INTC_REG(n, 0xc) argument
20 #define LS1X_INTC_INTPOL(n) LS1X_INTC_REG(n, 0x10) argument
21 #define LS1X_INTC_INTEDGE(n) LS1X_INTC_REG(n, 0x14) argument
26 unsigned int n = (d->irq - LS1X_IRQ_BASE) >> 5; in ls1x_irq_ack() local
28 __raw_writel(__raw_readl(LS1X_INTC_INTCLR(n)) in ls1x_irq_ack()
[all …]
/linux/drivers/usb/gadget/udc/
H A Dfusb300_udc.h21 #define FUSB300_OFFSET_EPSET0(n) (0x20 + (n - 1) * 0x30) argument
22 #define FUSB300_OFFSET_EPSET1(n) (0x24 + (n - 1) * 0x30) argument
23 #define FUSB300_OFFSET_EPSET2(n) (0x28 + (n - 1) * 0x30) argument
24 #define FUSB300_OFFSET_EPFFR(n) (0x2c + (n - 1) * 0x30) argument
25 #define FUSB300_OFFSET_EPSTRID(n) (0x40 + (n - 1) * 0x30) argument
54 #define FUSB300_OFFSET_EPPRD_W0(n) (0x520 + (n - 1) * 0x10) argument
55 #define FUSB300_OFFSET_EPPRD_W1(n) (0x524 + (n - 1) * 0x10) argument
56 #define FUSB300_OFFSET_EPPRD_W2(n) (0x528 + (n - 1) * 0x10) argument
57 #define FUSB300_OFFSET_EPRD_PTR(n) (0x52C + (n - 1) * 0x10) argument
60 #define FUSB300_OFFSET_EPPORT(n) (0x1010 + (n - 1) * 0x10) argument
[all …]
/linux/arch/alpha/lib/
H A Dmemcpy.c27 #define ALIGN_DEST_TO8_UP(d,s,n) \ argument
29 if (n <= 0) return; \
30 n--; \
34 #define ALIGN_DEST_TO8_DN(d,s,n) \ argument
36 if (n <= 0) return; \
37 n--; \
46 #define DO_REST_UP(d,s,n) \ argument
47 while (n > 0) { \
48 n--; \
52 #define DO_REST_DN(d,s,n) \ argument
[all …]
/linux/drivers/net/ethernet/intel/igc/
H A Digc_dump.c47 int n = 0; in igc_regdump() local
53 for (n = 0; n < 4; n++) in igc_regdump()
54 regs[n] = rd32(IGC_RDLEN(n)); in igc_regdump()
57 for (n = 0; n < 4; n++) in igc_regdump()
58 regs[n] = rd32(IGC_RDH(n)); in igc_regdump()
61 for (n = 0; n < 4; n++) in igc_regdump()
62 regs[n] = rd32(IGC_RDT(n)); in igc_regdump()
65 for (n = 0; n < 4; n++) in igc_regdump()
66 regs[n] = rd32(IGC_RXDCTL(n)); in igc_regdump()
69 for (n = 0; n < 4; n++) in igc_regdump()
[all …]
/linux/sound/ppc/
H A Dsnd_ps3_reg.h23 #define PS3_AUDIO_KICK(n) (PS3_AUDIO_DMAC_REGBASE(n) + 0x00) argument
24 #define PS3_AUDIO_SOURCE(n) (PS3_AUDIO_DMAC_REGBASE(n) + 0x04) argument
25 #define PS3_AUDIO_DEST(n) (PS3_AUDIO_DMAC_REGBASE(n) + 0x08) argument
26 #define PS3_AUDIO_DMASIZE(n) (PS3_AUDIO_DMAC_REGBASE(n) + 0x0C) argument
45 #define PS3_AUDIO_AO_3WCTRL(n) (0x00006200 + 0x200 * (n)) argument
53 #define PS3_AUDIO_AO_SPD_REGBASE(n) (0x00007200 + 0x200 * (n)) argument
55 #define PS3_AUDIO_AO_SPDCTRL(n) \ argument
56 (PS3_AUDIO_AO_SPD_REGBASE(n) + 0x00)
57 #define PS3_AUDIO_AO_SPDUB(n, x) \ argument
58 (PS3_AUDIO_AO_SPD_REGBASE(n) + 0x04 + 0x04 * (x))
[all …]
/linux/arch/arm/include/debug/
H A Dimx-uart.h11 #define IMX1_UART_BASE_ADDR(n) IMX1_UART##n##_BASE_ADDR argument
12 #define IMX1_UART_BASE(n) IMX1_UART_BASE_ADDR(n) argument
19 #define IMX25_UART_BASE_ADDR(n) IMX25_UART##n##_BASE_ADDR argument
20 #define IMX25_UART_BASE(n) IMX25_UART_BASE_ADDR(n) argument
26 #define IMX27_UART_BASE_ADDR(n) IMX27_UART##n##_BASE_ADDR argument
27 #define IMX27_UART_BASE(n) IMX27_UART_BASE_ADDR(n) argument
34 #define IMX31_UART_BASE_ADDR(n) IMX31_UART##n##_BASE_ADDR argument
35 #define IMX31_UART_BASE(n) IMX31_UART_BASE_ADDR(n) argument
40 #define IMX35_UART_BASE_ADDR(n) IMX35_UART##n##_BASE_ADDR argument
41 #define IMX35_UART_BASE(n) IMX35_UART_BASE_ADDR(n) argument
[all …]
/linux/drivers/clk/at91/
H A Dsam9x60.c83 char *n; member
92 { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
93 { .n = "uhpck", .p = "usbck", .id = 6 },
94 { .n = "pck0", .p = "prog0", .id = 8 },
95 { .n = "pck1", .p = "prog1", .id = 9 },
96 { .n = "qspick", .p = "masterck_div", .id = 19 },
100 char *n; member
104 { .n = "pioA_clk", .id = 2, },
105 { .n = "pioB_clk", .id = 3, },
106 { .n = "pioC_clk", .id = 4, },
[all …]
/linux/drivers/net/ethernet/meta/fbnic/
H A Dfbnic_csr.h197 #define FBNIC_INTR_STATUS(n) (0x00000 + (n)) /* 0x00000 + 4*n */ argument
199 #define FBNIC_INTR_MASK(n) (0x00008 + (n)) /* 0x00020 + 4*n */ argument
201 #define FBNIC_INTR_SET(n) (0x00010 + (n)) /* 0x00040 + 4*n */ argument
203 #define FBNIC_INTR_CLEAR(n) (0x00018 + (n)) /* 0x00060 + 4*n */ argument
205 #define FBNIC_INTR_SW_STATUS(n) (0x00020 + (n)) /* 0x00080 + 4*n */ argument
207 #define FBNIC_INTR_SW_AC_MODE(n) (0x00028 + (n)) /* 0x000a0 + 4*n */ argument
209 #define FBNIC_INTR_MASK_SET(n) (0x00030 + (n)) /* 0x000c0 + 4*n */ argument
211 #define FBNIC_INTR_MASK_CLEAR(n) (0x00038 + (n)) /* 0x000e0 + 4*n */ argument
214 #define FBNIC_INTR_MSIX_CTRL(n) (0x00040 + (n)) /* 0x00100 + 4*n */ argument
225 #define FBNIC_INTR_CQ_REARM(n) \ argument
[all …]
/linux/drivers/phy/allwinner/
H A Dphy-sun6i-mipi-dphy.c21 #define SUN6I_DPHY_GCTL_LANE_NUM(n) ((((n) - 1) & 3) << 4) argument
36 #define SUN6I_DPHY_TX_TIME0_HS_TRAIL(n) (((n) & 0xff) << 24) argument
37 #define SUN6I_DPHY_TX_TIME0_HS_PREPARE(n) (((n) & 0xff) << 16) argument
38 #define SUN6I_DPHY_TX_TIME0_LP_CLK_DIV(n) ((n) & 0xff) argument
41 #define SUN6I_DPHY_TX_TIME1_CLK_POST(n) (((n) & 0xff) << 24) argument
42 #define SUN6I_DPHY_TX_TIME1_CLK_PRE(n) (((n) & 0xff) << 16) argument
43 #define SUN6I_DPHY_TX_TIME1_CLK_ZERO(n) (((n) & 0xff) << 8) argument
44 #define SUN6I_DPHY_TX_TIME1_CLK_PREPARE(n) ((n) & 0xff) argument
47 #define SUN6I_DPHY_TX_TIME2_CLK_TRAIL(n) ((n) & 0xff) argument
52 #define SUN6I_DPHY_TX_TIME4_HS_TX_ANA1(n) (((n) & 0xff) << 8) argument
[all …]
/linux/drivers/usb/dwc3/
H A Dcore.h137 #define DWC3_GUSB2PHYCFG(n) (0xc200 + ((n) * 0x04)) argument
138 #define DWC3_GUSB2I2CCTL(n) (0xc240 + ((n) * 0x04)) argument
140 #define DWC3_GUSB2PHYACC(n) (0xc280 + ((n) * 0x04)) argument
142 #define DWC3_GUSB3PIPECTL(n) (0xc2c0 + ((n) * 0x04)) argument
144 #define DWC3_GTXFIFOSIZ(n) (0xc300 + ((n) * 0x04)) argument
145 #define DWC3_GRXFIFOSIZ(n) (0xc380 + ((n) * 0x04)) argument
147 #define DWC3_GEVNTADRLO(n) (0xc400 + ((n) * 0x10)) argument
148 #define DWC3_GEVNTADRHI(n) (0xc404 + ((n) * 0x10)) argument
149 #define DWC3_GEVNTSIZ(n) (0xc408 + ((n) * 0x10)) argument
150 #define DWC3_GEVNTCOUNT(n) (0xc40c + ((n) * 0x10)) argument
[all …]
/linux/tools/power/cpupower/po/
H A Dka.po9 "Project-Id-Version: cpufrequtils 006\n"
10 "Report-Msgid-Bugs-To: \n"
11 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
12 "PO-Revision-Date: 2022-09-18 22:12+0200\n"
13 "Last-Translator: Ekaterine Papava <katopapava@gmail.com>\n"
14 "Language-Team: NONE\n"
15 "Language: ka\n"
16 "MIME-Version: 1.0\n"
17 "Content-Type: text/plain; charset=UTF-8\n"
18 "Content-Transfer-Encoding: 8bit\n"
[all …]
/linux/drivers/media/platform/renesas/vsp1/
H A Dvsp1_regs.h17 #define VI6_CMD(n) (0x0000 + (n) * 4) argument
28 #define VI6_SRESET_SRTS(n) BIT(n) argument
31 #define VI6_STATUS_FLD_STD(n) BIT((n) + 28) argument
32 #define VI6_STATUS_SYS_ACT(n) BIT((n) + 8) argument
34 #define VI6_WPF_IRQ_ENB(n) (0x0048 + (n) * 12) argument
39 #define VI6_WPF_IRQ_STA(n) (0x004c + (n) * 12) argument
44 #define VI6_DISP_IRQ_ENB(n) (0x0078 + (n) * 60) argument
47 #define VI6_DISP_IRQ_ENB_LNEE(n) BIT(n) argument
49 #define VI6_DISP_IRQ_STA(n) (0x007c + (n) * 60) argument
52 #define VI6_DISP_IRQ_STA_LNE(n) BIT(n) argument
[all …]
/linux/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_du_regs.h72 #define DSSR_DFB(n) (1 << ((n)+15)) argument
78 #define DSSR_ADC(n) (1 << ((n)-1)) argument
86 #define DSRCR_ADCL(n) (1 << ((n)-1)) argument
95 #define DIER_ADCE(n) (1 << ((n)-1)) argument
104 #define DPPR_DPE(n) (1 << ((n)*4-1)) argument
105 #define DPPR_DPS(n, p) (((p)-1) << DPPR_DPS_SHIFT(n)) argument
106 #define DPPR_DPS_SHIFT(n) (((n)-1)*4) argument
154 #define DVCSR_VCnFB2_DSA0(n) (0 << ((n)*2+16)) argument
155 #define DVCSR_VCnFB2_DSA1(n) (1 << ((n)*2+16)) argument
156 #define DVCSR_VCnFB2_DSA2(n) (2 << ((n)*2+16)) argument
[all …]
/linux/tools/testing/selftests/powerpc/primitives/asm/
H A Dppc_asm.h72 #define ZEROIZE_GPR(n) ZEROIZE_GPRS(n, n)
74 #define SAVE_GPR(n, base) SAVE_GPRS(n, n, base)
75 #define REST_GPR(n, base) REST_GPRS(n, n, base)
82 #define SANITIZE_GPR(n) ZEROIZE_GP
[all...]
/linux/arch/powerpc/include/asm/
H A Dppc_asm.h72 #define ZEROIZE_GPR(n) ZEROIZE_GPRS(n, n)
74 #define SAVE_GPR(n, base) SAVE_GPRS(n, n, base)
75 #define REST_GPR(n, base) REST_GPRS(n, n, base)
82 #define SANITIZE_GPR(n) ZEROIZE_GPR(n)
89 #define SANITIZE_GPR(n)
96 #define SAVE_FPR(n, base) stfd n,8*TS_FPRWIDTH*(n)(base)
97 #define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base)
98 #define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
99 #define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
100 #define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
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