Searched refs:srd_reg (Results 1 – 4 of 4) sorted by relevance
99 ASSERT0(def.srd_reg & APERTURE_MASK); in amdzen_umc_smn_reg()109 const uint32_t reg = def.srd_reg + reginst32 * stride; in amdzen_umc_smn_reg()123 .srd_reg = 0x00, \129 .srd_reg = 0x10, \146 .srd_reg = 0xb00, \152 .srd_reg = 0xb10, \170 .srd_reg = 0x20, \176 .srd_reg = 0x28, \182 .srd_reg = 0x20, \188 .srd_reg = 0x30, \[all …]
108 const uint32_t reg = def.srd_reg + reginst32 * stride; in amdzen_smupwr_smn_reg()120 .srd_reg = 0x00 \154 .srd_reg = 0x18 \169 .srd_reg = 0x1c \186 .srd_reg = 0x20 \204 .srd_reg = 0x24 \249 const uint32_t reg = def.srd_reg + reginst32 * stride; in amdzen_l3soc_smn_reg()263 .srd_reg = 0x20 \279 .srd_reg = 0x30 \295 .srd_reg = 0x34 \[all …]
148 regdef.srd_reg = 0x154; in THM_DIE()154 regdef.srd_reg = 0x300; in THM_DIE()159 regdef.srd_reg = 0x308; in THM_DIE()163 regdef.srd_reg = 0x1f0; in THM_DIE()
478 uint32_t srd_reg; member513 ASSERT0(def.srd_reg & (_mask)); \523 const uint32_t reg = def.srd_reg + reginst32 * stride; \