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Searched refs:chip (Results 1 – 25 of 82) sorted by relevance

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/illumos-gate/usr/src/cmd/fm/eversholt/files/i386/i86pc/
H A Dintel.esc37 event ereport.cpu.intel.leafclass@chip/core/strand { within(t) }
56 engine serd.cpu.intel.simple@chip/core/strand, N=3, T=72h;
57 event fault.cpu.intel.internal@chip/core/strand,
58 engine=serd.cpu.intel.simple@chip/core/strand;
60 prop fault.cpu.intel.internal@chip/core/strand
62 ereport.cpu.intel.microcode_rom_parity@chip/core/strand,
63 ereport.cpu.intel.internal_timer@chip/core/strand,
64 ereport.cpu.intel.internal_parity@chip/core/strand,
65 ereport.cpu.intel.unclassified@chip/core/strand,
66 ereport.cpu.intel.frc@chip/core/strand;
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H A Damd64.esc57 * "prop foo@chip/memory-controller/dimm/rank -> blah@chip/core/strand"
61 * all dimms, ranks and cpus on the same chip (since chip appears in the
66 asru(chip/memory-controller/dimm/rank)) \
68 asru(chip/memory-controller/dimm)))
122 event ereport.cpu.amd.ic.inf_sys_ecc1@chip/core/strand{within(5s)};
123 event ereport.cpu.amd.dc.inf_sys_ecc1@chip/core/strand{within(5s)};
124 event ereport.cpu.amd.bu.s_ecc1@chip/core/strand{within(5s)};
125 event ereport.cpu.amd.nb.mem_ce@chip/core/strand{within(5s)};
145 engine stat.sbpgflt@chip/memory-controller/dimm/rank;
146 engine stat.ckpgflt@chip/memory-controller/dimm/rank;
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H A Dgcpu.esc44 event ereport.cpu.generic-x86.leafclass@chip/core/strand { within(1s) }
63 engine serd.cpu.generic-x86.simple@chip/core/strand, N=SMPL_N, T=72h;
64 event fault.cpu.generic-x86.internal@chip/core/strand,
65 engine=serd.cpu.generic-x86.simple@chip/core/strand;
67 prop fault.cpu.generic-x86.internal@chip/core/strand
70 ereport.cpu.generic-x86.microcode_rom_parity@chip/core/strand,
71 ereport.cpu.generic-x86.internal_timer@chip/core/strand,
72 ereport.cpu.generic-x86.internal_parity@chip/core/strand,
73 ereport.cpu.generic-x86.unclassified@chip/core/strand,
74 ereport.cpu.generic-x86.internal_unclassified@chip/core/strand,
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H A Dgcpu_amd.esc28 * Eversholt rules for generic AMD with on-chip memory-controller(s), as seen
32 * are observed via MCA (typically through an on-chip memory-controller)
44 * those chip versions that include an Online Spare Control register; this
45 * register provides counts of ECC errors seen per channel and chip-select
47 * hc:///motherboard/chip/memory-controller/dram-channel/chip-select
54 * The number of pages that must be faulted on a chip-select for repeated
62 * chip-select (must be at least CS_PAGEFLT_THRESH). If a chip-select
70 * correctable ereports are experienced on a single chip-select within
77 #define CSPATH chip/memory-controller/dram-channel/chip-select
86 * members matches the chip-select path. This is used to constrain
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/illumos-gate/usr/src/uts/common/io/vr/
H A Dvr.c426 if (vrp->chip.state == CHIPSTATE_RUNNING) in vr_detach()
536 if (vrp->chip.state == CHIPSTATE_SUSPENDED_RUNNING) in vr_resume()
552 if (vrp->chip.state == CHIPSTATE_RUNNING) { in vr_suspend()
554 vrp->chip.state = CHIPSTATE_SUSPENDED_RUNNING; in vr_suspend()
634 vrp->chip.vendor = VR_GET16(vrp->acc_cfg, PCI_CONF_VENID); in vr_bus_config()
635 vrp->chip.device = VR_GET16(vrp->acc_cfg, PCI_CONF_DEVID); in vr_bus_config()
636 vrp->chip.revision = VR_GET16(vrp->acc_cfg, PCI_CONF_REVID); in vr_bus_config()
643 if (vrp->chip.revision >= vr_chip_info[n].revmin && in vr_bus_config()
644 vrp->chip.revision <= vr_chip_info[n].revmax) { in vr_bus_config()
646 (void*)&vrp->chip.info, in vr_bus_config()
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/illumos-gate/usr/src/cmd/psrinfo/
H A Dpsrinfo.c244 struct pchip *chip; in print_vp() local
251 chip = l1->l_ptr; in print_vp()
253 if ((nspec != 0) && (chip->p_doit == 0)) in print_vp()
256 vcpu = chip->p_vcpus->l_ptr; in print_vp()
263 if ((chip->p_ncore == 1) || (chip->p_ncore == chip->p_nvcpu)) { in print_vp()
266 chip->p_nvcpu, in print_vp()
267 chip->p_nvcpu > 1 ? in print_vp()
273 chip->p_ncore, _("cores"), in print_vp()
274 chip->p_nvcpu, in print_vp()
275 chip->p_nvcpu > 1 ? in print_vp()
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/illumos-gate/usr/src/uts/intel/io/vmm/io/
H A Dvatpic.c813 struct vdi_atpic_chip_v1 *chip = &out->va_chip[i]; in vatpic_data_read() local
815 chip->vac_icw_state = src->icw_state; in vatpic_data_read()
816 chip->vac_status = in vatpic_data_read()
825 chip->vac_reg_irr = src->reg_irr; in vatpic_data_read()
826 chip->vac_reg_isr = src->reg_isr; in vatpic_data_read()
827 chip->vac_reg_imr = src->reg_imr; in vatpic_data_read()
828 chip->vac_irq_base = src->irq_base; in vatpic_data_read()
829 chip->vac_lowprio = src->lowprio; in vatpic_data_read()
830 chip->vac_elc = src->elc; in vatpic_data_read()
832 chip->vac_level[j] = src->acnt[j]; in vatpic_data_read()
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/illumos-gate/usr/src/uts/common/io/cxgbe/common/
H A Dcommon.c79 int is_t4(enum chip_type chip) in is_t4() argument
81 return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4); in is_t4()
84 int is_t5(enum chip_type chip) in is_t5() argument
87 return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5); in is_t5()
90 int is_t6(enum chip_type chip) in is_t6() argument
92 return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T6); in is_t6()
95 int is_fpga(enum chip_type chip) in is_fpga() argument
97 return chip & CHELSIO_CHIP_FPGA; in is_fpga()
H A Dt4_chip_type.h79 int is_t4(enum chip_type chip);
80 int is_t5(enum chip_type chip);
81 int is_t6(enum chip_type chip);
82 int is_fpga(enum chip_type chip);
/illumos-gate/usr/src/lib/fm/topo/modules/i86pc/chip/
H A Dchip.c482 tnode_t *chip; in create_chip() local
533 if ((chip = topo_node_lookup(pnode, CHIP_NODE_NAME, chipid)) == NULL) { in create_chip()
534 if ((chip = create_node(mod, pnode, auth, CHIP_NODE_NAME, in create_chip()
542 if (topo_method_register(mod, chip, chip_methods) < 0) in create_chip()
547 (void) topo_pgroup_create(chip, &chip_pgroup, &err); in create_chip()
548 nerr -= add_nvlist_strprop(mod, chip, cpu, PGNAME(CHIP), in create_chip()
550 nerr -= add_nvlist_longprops(mod, chip, cpu, PGNAME(CHIP), in create_chip()
559 if (brand != NULL && topo_prop_set_string(chip, PGNAME(CHIP), in create_chip()
566 if (socket != NULL && topo_prop_set_string(chip, PGNAME(CHIP), in create_chip()
584 if (topo_node_resource(chip, &fmri, &perr) != 0) in create_chip()
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H A Dchip_temp.c36 int32_t chip, core; in chip_create_core_temp_sensor() local
41 if (topo_prop_get_int32(pnode, PGNAME(CORE), CORE_CHIP_ID, &chip, in chip_create_core_temp_sensor()
47 chip, core) >= sizeof (buf)) { in chip_create_core_temp_sensor()
80 int32_t chip; in chip_create_chip_temp_sensor() local
83 chip = topo_node_instance(pnode); in chip_create_chip_temp_sensor()
86 chip) >= sizeof (buf)) { in chip_create_chip_temp_sensor()
H A Dchip_label.c179 tnode_t *chip; in simple_dimm_label_mp() local
214 chip = topo_node_parent(topo_node_parent(node)); in simple_dimm_label_mp()
218 (void) snprintf(buf, BUFSZ, fmtstr, topo_node_instance(chip), in simple_dimm_label_mp()
222 (void) snprintf(buf, BUFSZ, fmtstr, topo_node_instance(chip), in simple_dimm_label_mp()
223 (((topo_node_instance(chip) + 1) * dimms_per_chip) in simple_dimm_label_mp()
268 tnode_t *chip; in seq_dimm_label() local
294 chip = topo_node_parent(topo_node_parent(node)); in seq_dimm_label()
299 + (topo_node_instance(chip) * 4) + offset)); in seq_dimm_label()
303 (((topo_node_instance(chip) + 1) * 4) in seq_dimm_label()
673 tnode_t *chip, *chan; in simple_cs_label_mp() local
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H A DMakefile27 MODULE = chip
32 MODULESRCS = chip.c chip_label.c chip_subr.c chip_amd.c chip_intel.c \
/illumos-gate/usr/src/uts/intel/io/intel_nhm/
H A Dintel_nhmdrv.c121 int chip; in inhm_mc_ioctl() local
128 chip = getminor(dev) % MAX_CPU_NODES; in inhm_mc_ioctl()
129 if (inhm_mc_nvl[chip] == NULL || in inhm_mc_ioctl()
135 if (inhm_mc_nvl[chip]) in inhm_mc_ioctl()
137 inhm_create_nvl(chip); in inhm_mc_ioctl()
143 mcs.mcs_size = (uint32_t)inhm_mc_snapshotsz[chip]; in inhm_mc_ioctl()
151 if (ddi_copyout(inhm_mc_snapshot[chip], (void *)arg, in inhm_mc_ioctl()
152 inhm_mc_snapshotsz[chip], mode) < 0) in inhm_mc_ioctl()
/illumos-gate/usr/src/cmd/cxgbetool/
H A Dcudbg_view.c98 int is_t5(enum chip_type chip) in is_t5() argument
100 return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5); in is_t5()
103 int is_t6(enum chip_type chip) in is_t6() argument
105 return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T6); in is_t6()
252 enum chip_type chip) in view_ext_entity() argument
295 chip); in view_ext_entity()
525 enum chip_type chip) in view_cim_q() argument
658 struct cudbg_buffer *cudbg_poutbuf, enum chip_type chip) in view_cim_la() argument
662 if (is_t5(chip)) in view_cim_la()
664 else if (is_t6(chip)) in view_cim_la()
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/illumos-gate/usr/src/lib/fm/topo/modules/common/zen/
H A Dtopo_zen_tn.c432 tnode_t *chip = sock->ztes_tn; in topo_zen_build_ccds() local
434 if (topo_node_range_create(mod, chip, CCD, 0, sock->ztes_nccd - 1) != in topo_zen_build_ccds()
452 zt_ccd->ztccd_tn = topo_zen_create_tn(mod, sock, chip, ccdno, in topo_zen_build_ccds()
514 tnode_t *chip; in topo_zen_build_chip() local
516 chip = topo_zen_create_tn(mod, sock, pnode, inst, CHIP); in topo_zen_build_chip()
517 if (chip == NULL) { in topo_zen_build_chip()
521 if (topo_create_props(mod, chip, TOPO_PROP_IMMUTABLE, in topo_zen_build_chip()
529 topo_node_unbind(chip); in topo_zen_build_chip()
533 if (sock->ztes_cpu_rev != NULL && topo_create_props(mod, chip, in topo_zen_build_chip()
537 topo_node_unbind(chip); in topo_zen_build_chip()
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/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A Dql_hba_fru.c234 uint16_t chip = ha->device_id; in ql_populate_hba_fru_details() local
326 switch (chip & 0xFF00) { in ql_populate_hba_fru_details()
328 attrs->supported_speed = chip == 0x2071 ? in ql_populate_hba_fru_details()
332 attrs->supported_speed = chip == 0x2261 ? in ql_populate_hba_fru_details()
411 switch (chip & 0xFF00) { in ql_populate_hba_fru_details()
431 "%x", chip); in ql_populate_hba_fru_details()
433 FCHBA_MODEL_DESCRIPTION_LEN, "%x", chip); in ql_populate_hba_fru_details()
460 "%x", chip); in ql_populate_hba_fru_details()
462 FCHBA_MODEL_DESCRIPTION_LEN, "%x", chip); in ql_populate_hba_fru_details()
/illumos-gate/usr/src/uts/sun4u/sys/
H A Dopl_cfg.h60 #define OPL_PORTID(board, chip) ((1 << 10) | (board << 5) | (chip << 3)) argument
62 #define OPL_CPUID(board, chip, core, cpu) \ argument
64 ((board << 5) | (chip << 3) | (core << 1) | (cpu))
69 #define OPL_PROC_AS(board, chip) \ argument
72 (1ULL << 33) | ((uint64_t)chip << 4))
/illumos-gate/usr/src/uts/common/io/rge/
H A Drge_chip.c697 chip_id_t *chip = &rgep->chipid; in rge_chip_ident() local
706 chip->mac_ver = val32; in rge_chip_ident()
707 chip->is_pcie = pci_lcap_locate(rgep->cfg_handle, in rge_chip_ident()
713 chip->enable_mac_first = !chip->is_pcie; in rge_chip_ident()
714 if (chip->mac_ver == MAC_VER_8101E_C) { in rge_chip_ident()
715 chip->is_pcie = B_FALSE; in rge_chip_ident()
723 chip->phy_ver = val16; in rge_chip_ident()
726 if (chip->mac_ver == MAC_VER_8169 || in rge_chip_ident()
727 chip->mac_ver == MAC_VER_8169S_D || in rge_chip_ident()
728 chip->mac_ver == MAC_VER_8169S_E || in rge_chip_ident()
[all …]
/illumos-gate/usr/src/uts/sun4u/tazmo/io/
H A Denvctrl.c2895 struct envctrl_pcf8574_chip chip; in envctrl_set_fsp() local
2899 chip.val = ENVCTRL_FSP_OFF; /* init all values to off */ in envctrl_set_fsp()
2900 chip.chip_num = ENVCTRL_PCF8574_DEV6; /* 0x01 port 1 */ in envctrl_set_fsp()
2901 chip.type = PCF8574A; in envctrl_set_fsp()
2906 chip.val = (~(ENVCTRL_FSP_KEYMASK | ENVCTRL_FSP_POMASK) & (*val)); in envctrl_set_fsp()
2908 chip.val = ~chip.val; in envctrl_set_fsp()
2909 (void) envctrl_xmit(unitp, (caddr_t *)(void *)&chip, PCF8574); in envctrl_set_fsp()
2914 envctrl_get_dskled(struct envctrlunit *unitp, struct envctrl_pcf8574_chip *chip) in envctrl_get_dskled() argument
2920 if (chip->chip_num > ENVCTRL_PCF8574_DEV2 || in envctrl_get_dskled()
2921 chip->type != ENVCTRL_ENCL_BACKPLANE4 && in envctrl_get_dskled()
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/illumos-gate/usr/src/lib/libdtrace/common/
H A Dsched.d73 inline chipid_t chip = curcpu->cpu_chip; variable
74 #pragma D attributes Stable/Stable/Common chip
75 #pragma D binding "1.0" chip
/illumos-gate/usr/src/uts/sun4u/sunfire/io/
H A Djtag.c243 jtag_log_comp *chip; /* pointer to chip descriptor */ member
1636 find_chip(jtag_ring_desc *rd, jtag_log_comp *chip, int instance) in find_chip() argument
1643 if (rc->chip == chip) { in find_chip()
1717 status = jtag_single_IR_DR(jreg, comp, comp->chip->id_code, in jtag_get_comp_id()
1826 jtag_log_comp *chip; in jtag_init_chip() local
1836 chip = component->chip; in jtag_init_chip()
1837 pdesc = chip->init_pdesc; in jtag_init_chip()
1859 chip->init_code, scan_in, chip->dr_len, in jtag_init_chip()
1872 if (jtag_bf_cmp(scan_in, scan_out, chip->dr_len) != 0) in jtag_init_chip()
1896 jtag_log_comp *chip; in jtag_scanout_chip() local
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/illumos-gate/usr/src/uts/common/io/axf/
H A Daxf_usbgem.c82 (((struct axf_dev *)(dp)->private)->chip->type == CHIP_TYPE_AX88172)
85 (((struct axf_dev *)(dp)->private)->chip->type == CHIP_TYPE_AX88772)
255 struct chip_info *chip; member
338 val8 = lp->chip->gpio_reset[1] in axf_reset_phy()
339 | lp->chip->gpio_speed[dp->speed] in axf_reset_phy()
340 | lp->chip->gpio_duplex[dp->full_duplex]; in axf_reset_phy()
346 val8 = lp->chip->gpio_reset[0] in axf_reset_phy()
347 | lp->chip->gpio_speed[dp->speed] in axf_reset_phy()
348 | lp->chip->gpio_duplex[dp->full_duplex]; in axf_reset_phy()
618 gpio = lp->chip->gpio_reset[0]; in axf_set_media()
[all …]
/illumos-gate/usr/src/uts/intel/os/
H A Dcpc_subr.c244 pg_cmt_t *chip; in kcpc_hw_lwp_hook() local
263 while ((chip = group_iterate(chips, &i)) != NULL) { in kcpc_hw_lwp_hook()
264 if (GROUP_SIZE(&chip->cmt_cpus_actv) > 1) { in kcpc_hw_lwp_hook()
/illumos-gate/usr/src/uts/common/io/cxgbe/t4nex/
H A Dcudbg_lib.c318 cudbg_hdr->chip_ver = padap->params.chip; in cudbg_collect()
884 if (!is_t4(padap->params.chip)) { in collect_wc_stats()
957 if (is_t5(padap->params.chip)) { in fill_meminfo()
977 } else if (is_t6(padap->params.chip)) { in fill_meminfo()
1026 if (CHELSIO_CHIP_VERSION(padap->params.chip) <= CHELSIO_T5) { in fill_meminfo()
1057 if (!is_t4(padap->params.chip)) { in fill_meminfo()
1060 if (is_t5(padap->params.chip)) { in fill_meminfo()
1131 if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5) in fill_meminfo()
1136 if (is_t5(padap->params.chip)) { in fill_meminfo()
1148 if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5) in fill_meminfo()
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