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Searched refs:chan_type (Results 1 – 16 of 16) sorted by relevance

/illumos-gate/usr/src/test/os-tests/tests/zen_umc/
H A Dzen_umc_test_ilv.c75 .chan_type = UMC_DIMM_T_DDR4,
116 .chan_type = UMC_DIMM_T_DDR4,
157 .chan_type = UMC_DIMM_T_DDR4,
198 .chan_type = UMC_DIMM_T_DDR4,
278 .chan_type = UMC_DIMM_T_DDR4,
319 .chan_type = UMC_DIMM_T_DDR4,
360 .chan_type = UMC_DIMM_T_DDR4,
401 .chan_type = UMC_DIMM_T_DDR4,
459 .chan_type = UMC_DIMM_T_DDR4,
500 .chan_type = UMC_DIMM_T_DDR4,
[all …]
H A Dzen_umc_test_nps_k.c70 .chan_type = UMC_DIMM_T_DDR5,
114 .chan_type = UMC_DIMM_T_DDR5,
158 .chan_type = UMC_DIMM_T_DDR5,
202 .chan_type = UMC_DIMM_T_DDR5,
246 .chan_type = UMC_DIMM_T_DDR5,
290 .chan_type = UMC_DIMM_T_DDR5,
334 .chan_type = UMC_DIMM_T_DDR5,
378 .chan_type = UMC_DIMM_T_DDR5,
440 .chan_type = UMC_DIMM_T_DDR5,
484 .chan_type = UMC_DIMM_T_DDR5,
[all …]
H A Dzen_umc_test_nps.c68 .chan_type = UMC_DIMM_T_DDR5,
112 .chan_type = UMC_DIMM_T_DDR5,
156 .chan_type = UMC_DIMM_T_DDR5,
200 .chan_type = UMC_DIMM_T_DDR5,
244 .chan_type = UMC_DIMM_T_DDR5,
288 .chan_type = UMC_DIMM_T_DDR5,
332 .chan_type = UMC_DIMM_T_DDR5,
376 .chan_type = UMC_DIMM_T_DDR5,
438 .chan_type = UMC_DIMM_T_DDR5,
482 .chan_type = UMC_DIMM_T_DDR5,
[all …]
H A Dzen_umc_test_hole.c69 .chan_type = UMC_DIMM_T_DDR4,
110 .chan_type = UMC_DIMM_T_DDR4,
151 .chan_type = UMC_DIMM_T_DDR4,
192 .chan_type = UMC_DIMM_T_DDR4,
279 .chan_type = UMC_DIMM_T_DDR4,
319 .chan_type = UMC_DIMM_T_DDR4,
359 .chan_type = UMC_DIMM_T_DDR4,
399 .chan_type = UMC_DIMM_T_DDR4,
H A Dzen_umc_test_np2_k.c71 .chan_type = UMC_DIMM_T_DDR5,
115 .chan_type = UMC_DIMM_T_DDR5,
159 .chan_type = UMC_DIMM_T_DDR5,
242 .chan_type = UMC_DIMM_T_DDR5,
286 .chan_type = UMC_DIMM_T_DDR5,
330 .chan_type = UMC_DIMM_T_DDR5,
374 .chan_type = UMC_DIMM_T_DDR5,
418 .chan_type = UMC_DIMM_T_DDR5,
462 .chan_type = UMC_DIMM_T_DDR5,
545 .chan_type = UMC_DIMM_T_DDR5,
[all …]
H A Dzen_umc_test_remap.c69 .chan_type = UMC_DIMM_T_DDR4,
112 .chan_type = UMC_DIMM_T_DDR4,
155 .chan_type = UMC_DIMM_T_DDR4,
198 .chan_type = UMC_DIMM_T_DDR4,
302 .chan_type = UMC_DIMM_T_DDR4,
362 .chan_type = UMC_DIMM_T_DDR4,
422 .chan_type = UMC_DIMM_T_DDR4,
482 .chan_type = UMC_DIMM_T_DDR4,
H A Dzen_umc_test_cod.c67 .chan_type = UMC_DIMM_T_DDR4,
154 .chan_type = UMC_DIMM_T_DDR4,
198 .chan_type = UMC_DIMM_T_DDR4,
278 .chan_type = UMC_DIMM_T_DDR4,
323 .chan_type = UMC_DIMM_T_DDR4,
367 .chan_type = UMC_DIMM_T_DDR4,
411 .chan_type = UMC_DIMM_T_DDR4,
455 .chan_type = UMC_DIMM_T_DDR4,
499 .chan_type = UMC_DIMM_T_DDR4,
H A Dzen_umc_test_basic.c69 .chan_type = UMC_DIMM_T_DDR4,
147 .chan_type = UMC_DIMM_T_DDR4,
H A Dzen_umc_test_errors.c231 .chan_type = UMC_DIMM_T_DDR4,
387 .chan_type = UMC_DIMM_T_DDR4,
406 .chan_type = UMC_DIMM_T_DDR4,
H A Dzen_umc_test_multi.c80 .chan_type = UMC_DIMM_T_DDR4,
187 .chan_type = UMC_DIMM_T_DDR4,
H A Dzen_umc_test_chans.c82 .chan_type = UMC_DIMM_T_DDR4,
222 .chan_type = UMC_DIMM_T_DDR4,
358 .chan_type = UMC_DIMM_T_DDR4,
505 .chan_type = UMC_DIMM_T_DDR4,
661 .chan_type = UMC_DIMM_T_DDR4,
796 .chan_type = UMC_DIMM_T_DDR5,
/illumos-gate/usr/src/uts/common/io/xge/hal/include/
H A Dxgehal-device.h620 xge_hal_device_inject_bad_tcode(xge_hal_device_h devh, int chan_type, u8 t_code) in xge_hal_device_inject_bad_tcode() argument
622 ((xge_hal_device_t*)devh)->inject_bad_tcode_for_chan_type = chan_type; in xge_hal_device_inject_bad_tcode()
/illumos-gate/usr/src/uts/intel/io/amdzen/
H A Dzen_umc.h442 umc_dimm_type_t chan_type; member
H A Dzen_umc.c3059 chan->chan_type = dimm; in zen_umc_fill_ddr_type()
3132 const umc_dimm_type_t dimm_type = chan->chan_type; in zen_umc_fill_chan_freq()
/illumos-gate/usr/src/common/mc/zen_umc/
H A Dzen_umc_dump.c211 fnvlist_add_uint32(nvl, "chan_type", chan->chan_type); in zen_umc_dump_chan()
H A Dzen_umc_decode.c1943 switch (dec->dec_umc_chan->chan_type) { in zen_umc_decode_subchan()