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Searched refs:chan_type (Results 1 – 16 of 16) sorted by relevance

/illumos-gate/usr/src/test/os-tests/tests/zen_umc/
H A Dzen_umc_test_ilv.c75 .chan_type = UMC_DIMM_T_DDR4,
117 .chan_type = UMC_DIMM_T_DDR4,
159 .chan_type = UMC_DIMM_T_DDR4,
201 .chan_type = UMC_DIMM_T_DDR4,
282 .chan_type = UMC_DIMM_T_DDR4,
324 .chan_type = UMC_DIMM_T_DDR4,
366 .chan_type = UMC_DIMM_T_DDR4,
408 .chan_type = UMC_DIMM_T_DDR4,
467 .chan_type = UMC_DIMM_T_DDR4,
509 .chan_type = UMC_DIMM_T_DDR4,
[all …]
H A Dzen_umc_test_nps.c68 .chan_type = UMC_DIMM_T_DDR5,
113 .chan_type = UMC_DIMM_T_DDR5,
158 .chan_type = UMC_DIMM_T_DDR5,
203 .chan_type = UMC_DIMM_T_DDR5,
248 .chan_type = UMC_DIMM_T_DDR5,
293 .chan_type = UMC_DIMM_T_DDR5,
338 .chan_type = UMC_DIMM_T_DDR5,
383 .chan_type = UMC_DIMM_T_DDR5,
446 .chan_type = UMC_DIMM_T_DDR5,
491 .chan_type = UMC_DIMM_T_DDR5,
[all …]
H A Dzen_umc_test_nps_k.c70 .chan_type = UMC_DIMM_T_DDR5,
115 .chan_type = UMC_DIMM_T_DDR5,
160 .chan_type = UMC_DIMM_T_DDR5,
205 .chan_type = UMC_DIMM_T_DDR5,
250 .chan_type = UMC_DIMM_T_DDR5,
295 .chan_type = UMC_DIMM_T_DDR5,
340 .chan_type = UMC_DIMM_T_DDR5,
385 .chan_type = UMC_DIMM_T_DDR5,
448 .chan_type = UMC_DIMM_T_DDR5,
493 .chan_type = UMC_DIMM_T_DDR5,
[all …]
H A Dzen_umc_test_hole.c69 .chan_type = UMC_DIMM_T_DDR4,
111 .chan_type = UMC_DIMM_T_DDR4,
153 .chan_type = UMC_DIMM_T_DDR4,
195 .chan_type = UMC_DIMM_T_DDR4,
283 .chan_type = UMC_DIMM_T_DDR4,
324 .chan_type = UMC_DIMM_T_DDR4,
365 .chan_type = UMC_DIMM_T_DDR4,
406 .chan_type = UMC_DIMM_T_DDR4,
H A Dzen_umc_test_np2_k.c71 .chan_type = UMC_DIMM_T_DDR5,
116 .chan_type = UMC_DIMM_T_DDR5,
161 .chan_type = UMC_DIMM_T_DDR5,
245 .chan_type = UMC_DIMM_T_DDR5,
290 .chan_type = UMC_DIMM_T_DDR5,
335 .chan_type = UMC_DIMM_T_DDR5,
380 .chan_type = UMC_DIMM_T_DDR5,
425 .chan_type = UMC_DIMM_T_DDR5,
470 .chan_type = UMC_DIMM_T_DDR5,
554 .chan_type = UMC_DIMM_T_DDR5,
[all …]
H A Dzen_umc_test_remap.c69 .chan_type = UMC_DIMM_T_DDR4,
113 .chan_type = UMC_DIMM_T_DDR4,
157 .chan_type = UMC_DIMM_T_DDR4,
201 .chan_type = UMC_DIMM_T_DDR4,
306 .chan_type = UMC_DIMM_T_DDR4,
367 .chan_type = UMC_DIMM_T_DDR4,
428 .chan_type = UMC_DIMM_T_DDR4,
489 .chan_type = UMC_DIMM_T_DDR4,
H A Dzen_umc_test_cod.c67 .chan_type = UMC_DIMM_T_DDR4,
156 .chan_type = UMC_DIMM_T_DDR4,
201 .chan_type = UMC_DIMM_T_DDR4,
282 .chan_type = UMC_DIMM_T_DDR4,
328 .chan_type = UMC_DIMM_T_DDR4,
373 .chan_type = UMC_DIMM_T_DDR4,
418 .chan_type = UMC_DIMM_T_DDR4,
463 .chan_type = UMC_DIMM_T_DDR4,
508 .chan_type = UMC_DIMM_T_DDR4,
H A Dzen_umc_test_errors.c231 .chan_type = UMC_DIMM_T_DDR4,
388 .chan_type = UMC_DIMM_T_DDR4,
407 .chan_type = UMC_DIMM_T_DDR4,
H A Dzen_umc_test_basic.c69 .chan_type = UMC_DIMM_T_DDR4,
148 .chan_type = UMC_DIMM_T_DDR4,
H A Dzen_umc_test_multi.c80 .chan_type = UMC_DIMM_T_DDR4,
191 .chan_type = UMC_DIMM_T_DDR4,
H A Dzen_umc_test_chans.c82 .chan_type = UMC_DIMM_T_DDR4,
226 .chan_type = UMC_DIMM_T_DDR4,
366 .chan_type = UMC_DIMM_T_DDR4,
517 .chan_type = UMC_DIMM_T_DDR4,
677 .chan_type = UMC_DIMM_T_DDR4,
816 .chan_type = UMC_DIMM_T_DDR5,
/illumos-gate/usr/src/uts/common/io/xge/hal/include/
H A Dxgehal-device.h620 xge_hal_device_inject_bad_tcode(xge_hal_device_h devh, int chan_type, u8 t_code) in xge_hal_device_inject_bad_tcode() argument
622 ((xge_hal_device_t*)devh)->inject_bad_tcode_for_chan_type = chan_type; in xge_hal_device_inject_bad_tcode()
/illumos-gate/usr/src/uts/intel/io/amdzen/
H A Dzen_umc.h451 umc_dimm_type_t chan_type; member
H A Dzen_umc.c3089 chan->chan_type = dimm; in zen_umc_fill_ddr_type()
3162 const umc_dimm_type_t dimm_type = chan->chan_type; in zen_umc_fill_chan_freq()
/illumos-gate/usr/src/common/mc/zen_umc/
H A Dzen_umc_dump.c212 fnvlist_add_uint32(nvl, "chan_type", chan->chan_type); in zen_umc_dump_chan()
H A Dzen_umc_decode.c1947 switch (dec->dec_umc_chan->chan_type) { in zen_umc_decode_subchan()