Searched refs:XHCI_PS_PLS_SET (Results 1 – 5 of 5) sorted by relevance
122 #define XHCI_PS_PLS_SET(x) (((x) & 0xF) << 5) /* RW - port link state */ macro
406 XHCI_PS_PLS_SET(UPS_PORT_LS_POLL); in pci_xhci_usbcmd_write()409 XHCI_PS_PLS_SET(UPS_PORT_LS_U0); in pci_xhci_usbcmd_write()536 p->portsc |= XHCI_PS_PLS_SET(newpls) | in pci_xhci_portregs_write()2641 port->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_POLL) | in pci_xhci_init_port()2644 port->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_U0) | in pci_xhci_init_port()2651 port->portsc = XHCI_PS_PLS_SET(UPS_PORT_LS_RX_DET) | XHCI_PS_PP; in pci_xhci_init_port()2691 p->portsc |= XHCI_PS_PLS_SET(UPS_PORT_LS_RESUME); in pci_xhci_dev_intr()
384 reg |= XHCI_PS_PLS_SET(val); in xhci_root_hub_handle_port_set_feature()483 ps |= XHCI_PS_PLS_SET(XHCI_PS_PLS_GET(reg)); in xhci_root_hub_handle_port_get_status()
1900 reg |= XHCI_PS_PLS_SET(xis.xis_pls); in xhci_ioctl_setpls()
166 #define XHCI_PS_PLS_SET(x) (((x) & 0xF) << 5) /* RW - port link state */ macro