Searched refs:NXGE_MAX_TDCS (Results 1 – 12 of 12) sorted by relevance
248 #define NXGE_MAX_DMCS (NXGE_MAX_RDCS + NXGE_MAX_TDCS)250 #define NXGE_MAX_TDCS 24 macro442 #define TXDMA_CHANNEL_VALID(cn) (cn < NXGE_MAX_TDCS)477 ((n - NXGE_MAX_RDCS) < NXGE_MAX_TDCS)))
449 kstat_t *tdc_ksp[NXGE_MAX_TDCS];471 nxge_tx_ring_stats_t tdc_stats[NXGE_MAX_TDCS]; /* per tdc stats */518 #define NXGE_ILLEGAL_CHANNEL (NXGE_MAX_TDCS + 1)535 nxge_channel_t legend[NXGE_MAX_TDCS];797 boolean_t tdc_is_shared[NXGE_MAX_TDCS];800 nxge_ring_handle_t tx_ring_handles[NXGE_MAX_TDCS];
42 #define NXGE_TDMA_PER_NEP_PORT (NXGE_MAX_TDCS/NXGE_PORTS_NEPTUNE)465 nxge_tdc_cfg_t tdc_config[NXGE_MAX_TDCS];
312 nxge_hio_dc_t tdc[NXGE_MAX_TDCS];
110 for (tdc = 0; tdc < NXGE_MAX_TDCS; tdc++) { in nxge_init_txdma_channels()132 for (tdc = 0; tdc < NXGE_MAX_TDCS; tdc++) { in nxge_init_txdma_channels()193 for (tdc = 0; tdc < NXGE_MAX_TDCS; tdc++) { in nxge_uninit_txdma_channels()1339 for (tdc = 0; tdc < NXGE_MAX_TDCS; tdc++) { in nxge_txdma_hw_mode()1491 for (tdc = 0; tdc < NXGE_MAX_TDCS; tdc++) { in nxge_fixup_txdma_rings()1579 for (tdc = 0; tdc < NXGE_MAX_TDCS; tdc++) { in nxge_txdma_hw_kick()1715 for (tdc = 0; tdc < NXGE_MAX_TDCS; tdc++) { in nxge_txdma_hung()1872 for (tdc = 0; tdc < NXGE_MAX_TDCS; tdc++) { in nxge_fixup_hung_txdma_rings()2025 for (tdc = 0; tdc < NXGE_MAX_TDCS; tdc++) { in nxge_reclaim_rings()2066 for (tdc = 0; tdc < NXGE_MAX_TDCS; tdc++) { in nxge_txdma_regs_dump_channels()[all …]
146 for (i = 0; i < NXGE_MAX_TDCS; i++) in nxge_hio_init()223 for (dc = 0; dc < NXGE_MAX_TDCS; dc++) { in nxge_dci_map()441 if (channel > NXGE_MAX_TDCS) { in nxge_grp_dc_add()617 NXGE_MAX_TDCS : NXGE_MAX_RDCS; in nxge_grp_dc_find()1054 for (i = 0; i < NXGE_MAX_TDCS; i++) in nxge_hio_init()1447 for (i = 0; i < NXGE_MAX_TDCS; i++) { in nxge_hio_share_assign()1726 for (i = 0; i < NXGE_MAX_TDCS; i++) { in nxge_hio_share_add_group()1982 max_dcs = (type == MAC_RING_TYPE_TX) ? NXGE_MAX_TDCS : NXGE_MAX_RDCS; in nxge_hio_addres()
873 NXGE_MAX_TDCS) || in nxge_update_txdma_properties()876 NXGE_MAX_TDCS)) { in nxge_update_txdma_properties()885 if (num_tdc > NXGE_MAX_TDCS) { in nxge_update_txdma_properties()3231 for (channel = 0; channel < NXGE_MAX_TDCS; channel++) { in nxge_ldgv_init_n2()3402 for (channel = 0; channel < NXGE_MAX_TDCS; channel++) { in nxge_ldgv_init()
393 limit = NXGE_MAX_TDCS; in nxge_guest_dc_alloc()
995 for (tdc = 0; tdc < NXGE_MAX_TDCS; tdc++) { in nxge_param_get_txdma_info()2131 for (rdc = 0; rdc < NXGE_MAX_TDCS; rdc++) { in nxge_param_dump_rdc()2150 for (tdc = 0; tdc < NXGE_MAX_TDCS; tdc++) { in nxge_param_dump_tdc()
708 for (channel = 0; channel < NXGE_MAX_TDCS; channel++) { in nxge_hio_intr_uninit()
2155 int8_t set[NXGE_MAX_TDCS]; in nxge_m_tx_stat()2164 for (i = 0, cursor = 0; i < NXGE_MAX_TDCS; i++) { in nxge_m_tx_stat()
3016 tdc_max = NXGE_MAX_TDCS; in nxge_alloc_tx_mem_pool()3276 int tdc_max = NXGE_MAX_TDCS; in nxge_free_tx_mem_pool()