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Searched refs:LSHIFT (Results 1 – 14 of 14) sorted by relevance

/illumos-gate/usr/src/uts/common/io/rtw/
H A Drtwreg.h90 #define LSHIFT(x, mask) ((x) << MASK_TO_SHIFT(mask)) macro
91 #define MASK_AND_REPLACE(reg, val, mask) ((reg & ~mask) | LSHIFT(val, mask))
138 #define RTW_BRSR_MBR8180_1MBPS LSHIFT(0, RTW_BRSR_MBR8180_MASK)
139 #define RTW_BRSR_MBR8180_2MBPS LSHIFT(1, RTW_BRSR_MBR8180_MASK)
140 #define RTW_BRSR_MBR8180_5MBPS LSHIFT(2, RTW_BRSR_MBR8180_MASK)
141 #define RTW_BRSR_MBR8180_11MBPS LSHIFT(3, RTW_BRSR_MBR8180_MASK)
266 #define RTW_TCR_HWVERID_D LSHIFT(26, RTW_TCR_HWVERID_MASK)
267 #define RTW_TCR_HWVERID_F LSHIFT(27, RTW_TCR_HWVERID_MASK)
278 #define RTW_TCR_MXDMA_16 LSHIFT(0, RTW_TCR_MXDMA_MASK)
279 #define RTW_TCR_MXDMA_32 LSHIFT(1, RTW_TCR_MXDMA_MASK)
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H A Dmax2820reg.h128 #define MAX2820_SYNTH_R_22MHZ LSHIFT(0, MAX2820_SYNTH_R_MASK)
129 #define MAX2820_SYNTH_R_44MHZ LSHIFT(1, MAX2820_SYNTH_R_MASK)
131 #define MAX2820_SYNTH_R_DEFAULT LSHIFT(0, MAX2820_SYNTH_R_MASK)
140 #define MAX2820_CHANNEL_RSVD_DEFAULT LSHIFT(0, MAX2820_CHANNEL_RSVD)
141 #define MAX2820_CHANNEL_CF_DEFAULT LSHIFT(37, MAX2820_CHANNEL_CF_MASK)
177 #define MAX2820_RECEIVE_BW_8_5MHZ LSHIFT(0, MAX2820_RECEIVE_BW_MASK)
178 #define MAX2820_RECEIVE_BW_8MHZ LSHIFT(1, MAX2820_RECEIVE_BW_MASK)
179 #define MAX2820_RECEIVE_BW_7_5MHZ LSHIFT(2, MAX2820_RECEIVE_BW_MASK)
180 #define MAX2820_RECEIVE_BW_7MHZ LSHIFT(3, MAX2820_RECEIVE_BW_MASK)
181 #define MAX2820_RECEIVE_BW_6_5MHZ LSHIFT(4, MAX2820_RECEIVE_BW_MASK)
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H A Dsa2400reg.h78 #define SA2400_SYNB_L_INACTIVE0 LSHIFT(0, SA2400_SYNB_L_MASK)
79 #define SA2400_SYNB_L_INACTIVE1 LSHIFT(1, SA2400_SYNB_L_MASK)
80 #define SA2400_SYNB_L_NORMAL LSHIFT(2, SA2400_SYNB_L_MASK)
81 #define SA2400_SYNB_L_INACTIVE2 LSHIFT(3, SA2400_SYNB_L_MASK)
100 #define SA2400_SYNC_CP_NORMAL_ LSHIFT(0, SA2400_SYNC_CP_MASK)
101 #define SA2400_SYNC_CP_THIRD_ LSHIFT(1, SA2400_SYNC_CP_MASK)
102 #define SA2400_SYNC_CP_NORMAL LSHIFT(2, SA2400_SYNC_CP_MASK) /* recommended */
103 #define SA2400_SYNC_CP_THIRD LSHIFT(3, SA2400_SYNC_CP_MASK)
177 #define SA2400_OPMODE_MODE_SLEEP LSHIFT(0, SA2400_OPMODE_MODE_MASK)
178 #define SA2400_OPMODE_MODE_TXRX LSHIFT(1, SA2400_OPMODE_MODE_MASK)
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H A Drtwphyio.c55 LSHIFT(addr, RTW_BB_ADDR_MASK) | RTW_BB_RD_MASK | RTW_BB_WR_MASK); in rtw_bbp_read()
72 wrbbp = LSHIFT(addr, RTW_BB_ADDR_MASK) | RTW_BB_WREN | in rtw_bbp_write()
73 LSHIFT(val, RTW_BB_WR_MASK) | RTW_BB_RD_MASK, in rtw_bbp_write()
74 rdbbp = LSHIFT(addr, RTW_BB_ADDR_MASK) | in rtw_bbp_write()
208 return (LSHIFT(data_and_addr, RTW_PHYCFG_MAC_PHILIPS_ADDR_MASK | in rtw_grf5101_mac_crypt()
250 bits = LSHIFT(val, MAX2820_TWI_DATA_MASK) | in rtw_rf_hostwrite()
251 LSHIFT(addr, MAX2820_TWI_ADDR_MASK); in rtw_rf_hostwrite()
254 bits = LSHIFT(val, SA2400_TWI_DATA_MASK) | in rtw_rf_hostwrite()
255 LSHIFT(addr, SA2400_TWI_ADDR_MASK) | SA2400_TWI_WREN; in rtw_rf_hostwrite()
264 bits = LSHIFT(val, SI4126_TWI_DATA_MASK) | in rtw_rf_hostwrite()
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H A Drtwphy.c100 LSHIFT(cs_threshold, RTW_BBP_SYS3_CSTHRESH_MASK); in rtw_bbp_init()
207 syna = LSHIFT(nf, SA2400_SYNA_NF_MASK) | LSHIFT(n, SA2400_SYNA_N_MASK); in rtw_sa2400_tune()
215 synb = LSHIFT(11, SA2400_SYNB_R_MASK) | SA2400_SYNB_L_NORMAL | in rtw_sa2400_tune()
217 LSHIFT(80, SA2400_SYNB_FC_MASK); /* agrees w/ SA2400_SYNA_FM = 0 */ in rtw_sa2400_tune()
270 manrx |= LSHIFT(1023, SA2400_MANRX_RXGAIN_MASK); in rtw_sa2400_manrx_init()
360 agc = LSHIFT(25, SA2400_AGC_MAXGAIN_MASK); in rtw_sa2400_agc_init()
361 agc |= LSHIFT(7, SA2400_AGC_BBPDELAY_MASK); in rtw_sa2400_agc_init()
362 agc |= LSHIFT(15, SA2400_AGC_LNADELAY_MASK); in rtw_sa2400_agc_init()
363 agc |= LSHIFT(27, SA2400_AGC_RXONDELAY_MASK); in rtw_sa2400_agc_init()
500 LSHIFT(freq - 2400, MAX2820_CHANNEL_CF_MASK))); in rtw_max2820_tune()
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H A Dsi4136reg.h57 #define SI4126_MAIN_AUXSEL_RSVD LSHIFT(0x0, SI4126_MAIN_AUXSEL_MASK)
61 #define SI4126_MAIN_AUXSEL_FRCLOW LSHIFT(0x1, SI4126_MAIN_AUXSEL_MASK)
65 #define SI4126_MAIN_AUXSEL_LDETB LSHIFT(0x3, SI4126_MAIN_AUXSEL_MASK)
H A Drtw.c728 *rcr |= LSHIFT(MASK_AND_RSHIFT(RTW_SR_GET(sr, RTW_SR_RFPARM), in rtw_srom_parse()
893 cfg4 |= LSHIFT(0, RTW_CONFIG4_RFTYPE_MASK); in rtw_set_rfprog()
1720 tcr |= LSHIFT(0x4, RTW_TCR_SRL_MASK) | LSHIFT(0x4, RTW_TCR_LRL_MASK); in rtw_transmit_config()
1888 uint8_t phydelay = LSHIFT(0x6, RTW_PHYDELAY_PHYDELAY); in rtw_check_phydelay()
2164 LSHIFT(pktlen, RTW_TXCTL0_TPKTSIZE_MASK); in rtw_assembly_80211()
2209 ctl1 = LSHIFT(d0.d_plcp_len, RTW_TXCTL1_LENGTH_MASK) | in rtw_assembly_80211()
2210 LSHIFT(d0.d_rts_dur, RTW_TXCTL1_RTSDUR_MASK); in rtw_assembly_80211()
2359 bcnitv |= LSHIFT(intval, RTW_BCNITV_BCNITV_MASK); in rtw_join_bss()
2361 RTW_WRITE16(regs, RTW_ATIMWND, LSHIFT(1, RTW_ATIMWND_ATIMWND)); in rtw_join_bss()
2362 RTW_WRITE16(regs, RTW_ATIMTRITV, LSHIFT(2, RTW_ATIMTRITV_ATIMTRITV)); in rtw_join_bss()
/illumos-gate/usr/src/uts/i86pc/boot/
H A Dboot_keyboard_table.c39 #define LSHIFT KBTYPE_SPEC_LSHIFT macro
92 /* 2a */ LSHIFT, LSHIFT, LSHIFT, LSHIFT,
/illumos-gate/usr/src/cmd/sgs/m4/common/
H A Dm4y_xpg4.y46 %left LSHIFT RSHIFT
67 | e LSHIFT e { $$ = $1 << $3; }
113 return (peek3('=', LE, '<', LSHIFT, LT)); in yylex()
/illumos-gate/usr/src/uts/common/os/
H A Dmsacct.c460 #define LSHIFT 31 macro
461 #define LSI_ONE ((uint32_t)1 << LSHIFT) /* 32-bit scaled integer 1 */
491 ull = x >> (LSHIFT-2); in exp_x()
518 x = (x * x) >> LSHIFT; in exp_x()
540 return ((pct * exp_x(delta)) >> LSHIFT); in cpu_decay()
/illumos-gate/usr/src/common/ficl/test/
H A Dcore.fr61 TESTING 2* 2/ LSHIFT RSHIFT
80 { 1 0 LSHIFT -> 1 }
81 { 1 1 LSHIFT -> 2 }
82 { 1 2 LSHIFT -> 4 }
83 { 1 F LSHIFT -> 8000 } \ BIGGEST GUARANTEED SHIFT
84 { 1S 1 LSHIFT 1 XOR -> 1S }
85 { MSB 1 LSHIFT -> 0 }
309 { 2 MAX-INT M* -> MAX-INT 1 LSHIFT 0 }
338 { 1S 2 UM* -> 1S 1 LSHIFT 1 }
/illumos-gate/usr/src/cmd/fm/eversholt/common/
H A Descparse.y79 %left LSHIFT RSHIFT
309 | cexpr LSHIFT cexpr
H A Desclex.c566 return (record(LSHIFT, NULL)); in yylex()
760 case LSHIFT: in dumpline()
/illumos-gate/usr/src/lib/libsqlite/src/
H A Dparse.y141 %left BITAND BITOR LSHIFT RSHIFT.
577 expr(A) ::= expr(X) LSHIFT expr(Y). {A = sqliteExpr(TK_LSHIFT, X, Y, 0);}