/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/arm/ |
H A D | subsf3vfp.S | 22 vsub.f32 s0, s0, s1 26 vsub.f32 s14, s14, s15
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H A D | subdf3vfp.S | 21 vsub.f64 d0, d0, d1 25 vsub.f64 d6, d6, d7
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/freebsd/sys/arm/nvidia/drm2/ |
H A D | tegra_fb.c | 270 int hsub, vsub, i; in tegra_drm_fb_create() local 278 vsub = drm_format_vert_chroma_subsampling(cmd->pixel_format); in tegra_drm_fb_create() 286 height /= vsub; in tegra_drm_fb_create()
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/freebsd/lib/libc/arm/aeabi/ |
H A D | aeabi_vfp_float.S | 184 vsub.f32 s0, s0, s1
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H A D | aeabi_vfp_double.S | 197 vsub.f64 d0, d0, d1
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
H A D | arm_fp16.td | 118 def VSUBHS : SInst<"vsub", "111", "Sh">;
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H A D | arm_neon.td | 338 def VSUB : IOpInst<"vsub", "...", 764 def SUB : IOpInst<"vsub", "...", "dQd", OP_SUB>; 1306 def SCALAR_SUB : SInst<"vsub", "111", "SlSUl">; 1702 def VSUBH : SOpInst<"vsub", "...", "hQh", OP_SUB>;
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H A D | riscv_vector.td | 1200 defm vsub : RVVIntBinBuiltinSet;
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/freebsd/sys/dev/drm2/ |
H A D | drm_crtc.c | 2247 int ret, hsub, vsub, num_planes, i; in framebuffer_check() local 2256 vsub = drm_format_vert_chroma_subsampling(r->pixel_format); in framebuffer_check() 2264 if (r->height == 0 || r->height % vsub) { in framebuffer_check() 2271 unsigned int height = r->height / (i != 0 ? vsub : 1); in framebuffer_check()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonDepInstrInfo.td | 38881 "$Vd32.qf16 = vsub($Vu32.hf,$Vv32.hf)", 38894 "$Vd32.hf = vsub($Vu32.hf,$Vv32.hf)", 38907 "$Vd32.qf16 = vsub($Vu32.qf16,$Vv32.qf16)", 38920 "$Vd32.qf16 = vsub($Vu32.qf16,$Vv32.hf)", 38933 "$Vd32.qf32 = vsub($Vu32.qf32,$Vv32.qf32)", 38946 "$Vd32.qf32 = vsub($Vu32.qf32,$Vv32.sf)", 38959 "$Vd32.qf32 = vsub($Vu32.sf,$Vv32.sf)", 38972 "$Vdd32.sf = vsub($Vu32.bf,$Vv32.bf)", 38985 "$Vdd32.sf = vsub($Vu32.hf,$Vv32.hf)", 38998 "$Vd32.sf = vsub( [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstrVFP.td | 453 IIC_fpALU64, "vsub", ".f64\t$Dd, $Dn, $Dm", 460 IIC_fpALU32, "vsub", ".f32\t$Sd, $Sn, $Sm", 471 IIC_fpALU16, "vsub", ".f16\t$Sd, $Sn, $Sm",
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H A D | ARMInstrMVE.td | 2058 : MVE_VADDSUB_m<"vsub", VTI, 0b1, sub, int_arm_mve_sub_predicated>; 3783 : MVE_VADDSUB_fp_m<"vsub", 1, VTI, fsub, int_arm_mve_sub_predicated, IdentityVec>; 5271 : MVE_VADDSUB_qr_m<"vsub", VTI, 0b1, sub, int_arm_mve_sub_predicated>; 5422 defm MVE_VSUB_qr_f32 : MVE_VADDSUB_qr_f<"vsub", MVE_v4f32, 0b1, fsub, 5424 defm MVE_VSUB_qr_f16 : MVE_VADDSUB_qr_f<"vsub", MVE_v8f16, 0b1, fsub,
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H A D | ARMInstrNEON.td | 5082 "vsub", "i", sub, 0>; 5083 def VSUBfd : N3VD<0, 0, 0b10, 0b1101, 0, IIC_VBIND, "vsub", "f32", 5085 def VSUBfq : N3VQ<0, 0, 0b10, 0b1101, 0, IIC_VBINQ, "vsub", "f32", 5087 def VSUBhd : N3VD<0, 0, 0b11, 0b1101, 0, IIC_VBIND, "vsub", "f16", 5090 def VSUBhq : N3VQ<0, 0, 0b11, 0b1101, 0, IIC_VBINQ, "vsub", "f16", 9127 def : NEONMnemonicAlias<"vsubq", "vsub">;
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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
H A D | IntrinsicsRISCV.td | 1392 defm vsub : RISCVBinaryAAX;
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVInstrInfoV.td | 1096 defm VSUB_V : VALU_IV_V_X<"vsub", 0b000010>;
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H A D | RISCVInstrInfoVPseudos.td | 6213 // Match vrsub with 2 vector operands to vsub.vv by swapping operands. This
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86InstrAVX512.td | 5477 defm VSUB : avx512_binop_s_round<0x5C, "vsub", any_fsub, X86fsubs, X86fsubRnds, 5682 defm VSUB : avx512_fp_binop_p<0x5C, "vsub", any_fsub, fsub, HasAVX512, 5684 avx512_fp_binop_ph<0x5C, "vsub", any_fsub, fsub, SchedWriteFAddSizes>, 5685 avx512_fp_binop_p_round<0x5C, "vsub", X86fsubRnd, SchedWriteFAddSizes>;
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