| /freebsd/tools/regression/p1003_1b/ |
| H A D | sched.c | 64 int smin; in checkpris() local
69 if ( (smin = sched_get_priority_min(sched)) == -1 && errno) in checkpris()
75 if (smax - smin + 1 < 32 || smax < smin) { in checkpris()
77 sched_text(sched), smin, smax); in checkpris()
83 sched_text(sched), smin, smax); in checkpris()
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| /freebsd/contrib/ncurses/form/ |
| H A D | frm_def.c | 242 form->page[page_nr].smin = fld->index; in Connect_Fields()
247 form->page[page_nr].smin = 0; in Connect_Fields()
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| H A D | form.h | 78 short smin; /* index of top leftmost field on page */ member
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFCheckAndAdjustIR.cpp | 213 case Intrinsic::smin: in sinkMinMaxInBB()
278 if (ICmpInst::isSigned(P) && IID != Intrinsic::smin && in sinkMinMaxInBB()
286 bool IsMin = IID == Intrinsic::smin || IID == Intrinsic::umin; in sinkMinMaxInBB()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicInst.h | 62 case Intrinsic::smin: in isAssociative()
80 case Intrinsic::smin: in isCommutative()
757 case Intrinsic::smin: in classof()
778 case Intrinsic::smin: in getPredicate()
809 case Intrinsic::smin: in getSaturationPoint()
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| H A D | ConstantRange.h | 454 ConstantRange smin(const ConstantRange &Other) const;
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| H A D | VPIntrinsics.def | 211 // llvm.vp.smin(x,y,mask,vlen)
215 VP_PROPERTY_FUNCTIONAL_INTRINSIC(smin)
684 // llvm.vp.reduce.smin(start,x,mask,vlen)
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | ConstantRange.cpp | 1006 case Intrinsic::smin: in isIntrinsicSupported()
1033 case Intrinsic::smin: in intrinsic()
1034 return Ops[0].smin(Ops[1]); in intrinsic()
1296 ConstantRange::smin(const ConstantRange &Other) const { in smin() function in ConstantRange
1301 APInt NewL = APIntOps::smin(getSignedMin(), Other.getSignedMin()); in smin()
1302 APInt NewU = APIntOps::smin(getSignedMax(), Other.getSignedMax()) + 1; in smin()
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| H A D | ConstantRangeList.cpp | 217 APInt End = APIntOps::smin(Range.getUpper(), OtherRange.getUpper()); in intersectWith()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 1089 assert((MinMaxID == Intrinsic::smax || MinMaxID == Intrinsic::smin || in moveAddAfterMinMax()
1102 bool IsSigned = MinMaxID == Intrinsic::smax || MinMaxID == Intrinsic::smin; in moveAddAfterMinMax()
1201 case Intrinsic::smin: in foldClampRangeOfTwo()
1247 (MinMaxID == Intrinsic::smin && InnerMinMaxID == Intrinsic::umin)) && in reassociateMinMaxWithConstants()
1355 case Intrinsic::smin: in foldShuffledIntrinsicOperands()
1736 case Intrinsic::smin: { in visitCallInst()
1763 if ((IID == Intrinsic::umax || IID == Intrinsic::smin) && in visitCallInst()
1768 if (IID == Intrinsic::smax || IID == Intrinsic::smin) { in visitCallInst()
1796 bool UseAndN = IID == Intrinsic::smin || IID == Intrinsic::umin; in visitCallInst()
1798 if (IID == Intrinsic::smax || IID == Intrinsic::smin) { in visitCallInst()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | MVELaneInterleavingPass.cpp | 210 case Intrinsic::smin: in tryInterleave()
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| H A D | ARMTargetTransformInfo.cpp | 969 IID = Intrinsic::smin; in getCmpSelInstrCost()
1869 if (IID == Intrinsic::smin || IID == Intrinsic::smax || in getMinMaxReductionCost()
1923 case Intrinsic::smin: in getIntrinsicInstrCost()
1977 IntrinsicCostAttributes Attrs1(IsSigned ? Intrinsic::smin in getIntrinsicInstrCost()
2250 if ((II->getIntrinsicID() == Intrinsic::smin || in canTailPredicateInstruction()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | KnownBits.h | 390 static KnownBits smin(const KnownBits &LHS, const KnownBits &RHS);
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ExpandVectorPredication.cpp | 294 case Intrinsic::smin: in expandPredicationToIntCall()
465 Builder.CreateBinaryIntrinsic(Intrinsic::smin, Reduction, Start); in expandPredicationInReduction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DXILIntrinsicExpansion.cpp | 241 return Intrinsic::smin; in getMinForClamp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.cpp | 855 case Intrinsic::smin: in getIntrinsicInstrCost()
870 case Intrinsic::smin: in getIntrinsicInstrCost()
1157 if (IID == Intrinsic::umax || IID == Intrinsic::smin) in getMinMaxReductionCost()
1218 case Intrinsic::smin: in getMinMaxReductionCost()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | DemandedBits.cpp | 144 case Intrinsic::smin: in determineLiveOperandBits()
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| H A D | ValueTracking.cpp | 1762 case Intrinsic::smin: in computeKnownBitsFromOperator()
1765 Known = KnownBits::smin(Known, Known2); in computeKnownBitsFromOperator()
2359 case Intrinsic::smin: in isKnownToBeAPowerOfTwo()
3152 case Intrinsic::smin: { in isKnownNonZeroFromOperator()
3701 assert((II->getIntrinsicID() == Intrinsic::smin || in isSignedMinMaxIntrinsicClamp()
3711 if (II->getIntrinsicID() == Intrinsic::smin) in isSignedMinMaxIntrinsicClamp()
4081 case Intrinsic::smin: in ComputeNumSignBitsImpl()
7284 case Intrinsic::smin: in canCreateUndefOrPoison()
7797 case Intrinsic::smin: in propagatesPoison()
8781 case Intrinsic::smax: return Intrinsic::smin; in getInverseMinMaxIntrinsic()
[all …]
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| H A D | ConstantFolding.cpp | 1509 case Intrinsic::smin: in canConstantFoldCallTo()
1856 Acc = APIntOps::smin(Acc, X); in constantFoldVectorReduce()
2793 case Intrinsic::smin: in ConstantFoldIntrinsicCall2()
3190 Product = APIntOps::smin(Product, Max); in ConstantFoldScalarCall3()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | LowerSwitch.cpp | 424 APInt Min = APIntOps::smin(ValRange.getSignedMin(), Low); in ProcessSwitchInst()
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| H A D | LoopUtils.cpp | 997 return Intrinsic::smin; in getMinMaxReductionIntrinsicOp()
1020 return Intrinsic::smin; in getMinMaxReductionIntrinsicOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SMEInstrInfo.td | 412 defm SMIN_VG2_2ZZ : sme2_int_sve_destructive_vector_vg2_single<"smin", 0b0000010>;
413 defm SMIN_VG4_4ZZ : sme2_int_sve_destructive_vector_vg4_single<"smin", 0b0000010>;
414 defm SMIN_VG2_2Z2Z : sme2_int_sve_destructive_vector_vg2_multi<"smin", 0b0000010>;
415 defm SMIN_VG4_4Z4Z : sme2_int_sve_destructive_vector_vg4_multi<"smin", 0b0000010>;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/ |
| H A D | SelectionDAGCompat.td | 169 def : GINodeEquiv<G_SMIN, smin>;
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | GISelKnownBits.cpp | 345 Known = KnownBits::smin(Known, KnownRHS); in computeKnownBitsImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsMSAInstrInfo.td | 2396 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", smin, MSA128BOpnd>;
2397 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", smin, MSA128HOpnd>;
2398 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", smin, MSA128WOpnd>;
2399 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", smin, MSA128DOpnd>;
2406 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", smin, vsplati8_simm5,
2408 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", smin, vsplati16_simm5,
2410 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", smin, vsplati32_simm5,
2412 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", smin, vsplati64_simm5,
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