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Searched refs:shuffles (Results 1 – 19 of 19) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86Schedule.td312 defm WriteFShuffle : X86SchedWritePair<ReadAfterVecXLd>; // Floating point vector shuffles.
313 defm WriteFShuffleY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point vector shuffles (YMM).
314 defm WriteFShuffleZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point vector shuffles (ZMM).
315 defm WriteFVarShuffle : X86SchedWritePair<ReadAfterVecXLd>; // Floating point vector variable shuffles.
316 defm WriteFVarShuffleY : X86SchedWritePair<ReadAfterVecYLd>; // Floating point vector variable shuffles (YMM).
317 defm WriteFVarShuffleZ : X86SchedWritePair<ReadAfterVecYLd>; // Floating point vector variable shuffles (ZMM).
387 defm WriteShuffle : X86SchedWritePair<ReadAfterVecLd>; // Vector shuffles.
388 defm WriteShuffleX : X86SchedWritePair<ReadAfterVecXLd>; // Vector shuffles (XMM).
389 defm WriteShuffleY : X86SchedWritePair<ReadAfterVecYLd>; // Vector shuffles (YMM).
390 defm WriteShuffleZ : X86SchedWritePair<ReadAfterVecYLd>; // Vector shuffles (ZM
[all...]
H A DX86ScheduleZnver3.td954 … : Zn3WriteResXMMPair<WriteFShuffle, [Zn3FPVShuf01], 1, [1], 1>; // Floating point vector shuffles.
955 …riteResYMMPair<WriteFShuffleY, [Zn3FPVShuf01], 1, [1], 1>; // Floating point vector shuffles (YMM).
956 defm : X86WriteResPairUnsupported<WriteFShuffleZ>; // Floating point vector shuffles (ZMM).
957 …esXMMPair<WriteFVarShuffle, [Zn3FPVShuf01], 3, [1], 1>; // Floating point vector variable shuffles.
958 …ir<WriteFVarShuffleY, [Zn3FPVShuf01], 3, [1], 1>; // Floating point vector variable shuffles (YMM).
959 defm : X86WriteResPairUnsupported<WriteFVarShuffleZ>; // Floating point vector variable shuffles (Z…
1115 defm : Zn3WriteResXMMPair<WriteShuffle, [Zn3FPVShuf01], 1, [1], 1>; // Vector shuffles.
1116 defm : Zn3WriteResXMMPair<WriteShuffleX, [Zn3FPVShuf01], 1, [1], 1>; // Vector shuffles (XMM).
1117 defm : Zn3WriteResYMMPair<WriteShuffleY, [Zn3FPVShuf01], 1, [1], 1>; // Vector shuffles (YMM).
1118 defm : X86WriteResPairUnsupported<WriteShuffleZ>; // Vector shuffles (ZMM).
[all …]
H A DX86SchedBroadwell.td341 defm : BWWriteResPair<WriteFShuffle, [BWPort5], 1, [1], 1, 5>; // Floating point vector shuffles.
342 defm : BWWriteResPair<WriteFShuffleY, [BWPort5], 1, [1], 1, 6>; // Floating point vector shuffles (…
344 …iteResPair<WriteFVarShuffle, [BWPort5], 1, [1], 1, 5>; // Floating point vector variable shuffles.
345 …iteResPair<WriteFVarShuffleY, [BWPort5], 1, [1], 1, 6>; // Floating point vector variable shuffles.
350 …m : BWWriteResPair<WriteFShuffle256, [BWPort5], 3, [1], 1, 6>; // Fp 256-bit width vector shuffles.
351 …esPair<WriteFVarShuffle256, [BWPort5], 3, [1], 1, 6>; // Fp 256-bit width vector variable shuffles.
452 defm : BWWriteResPair<WriteShuffle, [BWPort5], 1, [1], 1, 5>; // Vector shuffles.
453 defm : BWWriteResPair<WriteShuffleX, [BWPort5], 1, [1], 1, 5>; // Vector shuffles.
454 defm : BWWriteResPair<WriteShuffleY, [BWPort5], 1, [1], 1, 6>; // Vector shuffles (YMM/ZMM).
456 defm : BWWriteResPair<WriteVarShuffle, [BWPort5], 1, [1], 1, 5>; // Vector variable shuffles.
[all …]
H A DX86ScheduleZnver4.td967 … : Zn4WriteResXMMPair<WriteFShuffle, [Zn4FPVShuf01], 1, [1], 1>; // Floating point vector shuffles.
968 …riteResYMMPair<WriteFShuffleY, [Zn4FPVShuf01], 1, [1], 1>; // Floating point vector shuffles (YMM).
969 …riteResZMMPair<WriteFShuffleZ, [Zn4FPVShuf01], 1, [2], 1>; // Floating point vector shuffles (ZMM).
970 …esXMMPair<WriteFVarShuffle, [Zn4FPVShuf01], 3, [1], 1>; // Floating point vector variable shuffles.
971 …ir<WriteFVarShuffleY, [Zn4FPVShuf01], 3, [1], 1>; // Floating point vector variable shuffles (YMM).
972 …ir<WriteFVarShuffleZ, [Zn4FPVShuf01], 3, [2], 1>; // Floating point vector variable shuffles (ZMM).
1159 defm : Zn4WriteResXMMPair<WriteShuffle, [Zn4FPVShuf01], 1, [1], 1>; // Vector shuffles.
1160 defm : Zn4WriteResXMMPair<WriteShuffleX, [Zn4FPVShuf01], 1, [1], 1>; // Vector shuffles (XMM).
1161 defm : Zn4WriteResYMMPair<WriteShuffleY, [Zn4FPVShuf01], 1, [1], 1>; // Vector shuffles (YMM).
1162 defm : Zn4WriteResZMMPair<WriteShuffleZ, [Zn4FPVShuf01], 1, [2], 1>; // Vector shuffles (ZMM).
[all …]
H A DX86SchedSkylakeClient.td328 defm : SKLWriteResPair<WriteFShuffle, [SKLPort5], 1, [1], 1, 6>; // Floating point vector shuffles.
331 … : SKLWriteResPair<WriteFVarShuffle, [SKLPort5], 1, [1], 1, 6>; // Floating point vector shuffles.
386 defm : SKLWriteResPair<WriteShuffle, [SKLPort5], 1, [1], 1, 5>; // Vector shuffles.
390 defm : SKLWriteResPair<WriteVarShuffle, [SKLPort0,SKLPort5], 1, [1,1], 2, 5>; // Vector shuffles.
601 …: SKLWriteResPair<WriteFShuffle256, [SKLPort5], 3, [1], 1, 7>; // Fp 256-bit width vector shuffles.
602 …sPair<WriteFVarShuffle256, [SKLPort5], 3, [1], 1, 7>; // Fp 256-bit width vector variable shuffles.
603 …fm : SKLWriteResPair<WriteShuffle256, [SKLPort5], 3, [1], 1, 7>; // 256-bit width vector shuffles.
605 …eResPair<WriteVarShuffle256, [SKLPort5], 3, [1], 1, 7>; // 256-bit width vector variable shuffles.
H A DX86.td574 // using a variable mask over multiple fixed shuffles.
578 "true", "Cross-lane shuffles with variable masks are fast">;
582 "true", "Per-lane shuffles with variable masks are fast">;
607 // Prefer lowering shuffles on AVX512 targets (e.g. Skylake Server) to
608 // imm shifts/rotate if they can use more ports than regular shuffles.
730 // Combine vector math operations with shuffles into horizontal math
737 "normal vector instructions with shuffles">;
H A DX86SchedSkylakeServer.td328 defm : SKXWriteResPair<WriteFShuffle, [SKXPort5], 1, [1], 1, 6>; // Floating point vector shuffles.
331 …teResPair<WriteFVarShuffle, [SKXPort5], 1, [1], 1, 6>; // Floating point vector variable shuffles.
386 defm : SKXWriteResPair<WriteShuffle, [SKXPort5], 1, [1], 1, 5>; // Vector shuffles.
390 …KXWriteResPair<WriteVarShuffle, [SKXPort0,SKXPort5], 1, [1,1], 2, 5>; // Vector variable shuffles.
595 …: SKXWriteResPair<WriteFShuffle256, [SKXPort5], 3, [1], 1, 7>; // Fp 256-bit width vector shuffles.
596 …sPair<WriteFVarShuffle256, [SKXPort5], 3, [1], 1, 7>; // Fp 256-bit width vector variable shuffles.
597 …fm : SKXWriteResPair<WriteShuffle256, [SKXPort5], 3, [1], 1, 7>; // 256-bit width vector shuffles.
599 …eResPair<WriteVarShuffle256, [SKXPort5], 3, [1], 1, 7>; // 256-bit width vector variable shuffles.
H A DX86SchedIceLake.td333 …fm : ICXWriteResPair<WriteFShuffle, [ICXPort15], 1, [1], 1, 6>; // Floating point vector shuffles.
336 …eResPair<WriteFVarShuffle, [ICXPort15], 1, [1], 1, 6>; // Floating point vector variable shuffles.
391 defm : ICXWriteResPair<WriteShuffle, [ICXPort5], 1, [1], 1, 5>; // Vector shuffles.
395 …XWriteResPair<WriteVarShuffle, [ICXPort0,ICXPort5], 1, [1,1], 2, 5>; // Vector variable shuffles.
598 …: ICXWriteResPair<WriteFShuffle256, [ICXPort5], 3, [1], 1, 7>; // Fp 256-bit width vector shuffles.
599 …sPair<WriteFVarShuffle256, [ICXPort5], 3, [1], 1, 7>; // Fp 256-bit width vector variable shuffles.
600 …fm : ICXWriteResPair<WriteShuffle256, [ICXPort5], 3, [1], 1, 7>; // 256-bit width vector shuffles.
602 …eResPair<WriteVarShuffle256, [ICXPort5], 3, [1], 1, 7>; // 256-bit width vector variable shuffles.
H A DX86ScheduleBdVer2.td171 // One unit for shuffles, packs, permutes, shifts.
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAGHVX.cpp799 namespace shuffles { namespace
1309 shuffles::MaskT MaskH(SM.Mask); in packs()
1430 shuffles::MaskT MaskA(SMH.Mask); in packs()
1434 shuffles::MaskT Swapped(SMH.Mask); in packs()
1610 shuffles::MaskT PackedMask(VecLen); in shuffs2()
1618 shuffles::MaskT MaskL(VecLen), MaskR(VecLen); in shuffs2()
1643 shuffles::MaskT PackedMask(VecLen); in shuffp1()
2110 if (same(SM.Mask, shuffles::mask(shuffles::vpack, HwLen, Size, Odd))) { in contracting()
2126 if (same(SM.Mask, shuffles::mask(shuffles::vshuff, HwLen, Size, Odd))) { in contracting()
2147 if (same(SM.Mask, shuffles::mask(shuffles::vdeal, HwLen, Size, Odd))) { in contracting()
[all …]
H A DHexagonPatternsHVX.td142 // The HVX selection code for shuffles can generate vector constants.
/freebsd/sys/contrib/openzfs/module/icp/asm-x86_64/modes/
H A Daesni-gcm-x86_64.S30 # Locktyukhin of Intel Corp. who verified that it reduces shuffles
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/
H A DCombine.td1580 // Combines shuffles of vector into build_vector
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsics.td2751 //===------------ Intrinsics to perform common vector shuffles ------------===//
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrMVE.td4418 // shuffles. We also sometimes need to cast between different predicate
4419 // vector types (v4i1<>v8i1, etc.) also as part of lowering vector shuffles.
H A DARMInstrNEON.td2620 // 2-register shuffles (VTRN/VZIP/VUZP), both double- and quad-register.
/freebsd/crypto/openssh/
H A DChangeLog9761 this shuffles the contents of this file to make it easy to un-ignore
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td878 // Vector shuffles
/freebsd/contrib/ntp/
H A DCommitLog[all...]