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Searched refs:setReg (Results 1 – 25 of 185) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineLoopUtils.cpp55 MO.setReg(R); in PeelSingleBlockLoop()
71 Use->setReg(R); in PeelSingleBlockLoop()
81 MO.setReg(It->second); in PeelSingleBlockLoop()
96 OrigPhi.getOperand(InitRegIdx).setReg(R); in PeelSingleBlockLoop()
103 MI.getOperand(LoopRegIdx).setReg(LoopReg); in PeelSingleBlockLoop()
H A DInitUndef.cpp199 UseMO.setReg(LatestReg); in handleSubReg()
216 MO.setReg(NewReg); in fixupIllOperand()
242 UseMO.setReg(NewDest); in processBasicBlock()
H A DTailDuplicator.cpp242 UseMO->setReg( in tailDuplicateAndUpdate()
414 MO.setReg(NewReg); in duplicateInstruction()
453 MO.setReg(VI->second.Reg); in duplicateInstruction()
468 MO.setReg(NewReg); in duplicateInstruction()
536 MI.getOperand(Idx).setReg(SrcReg); in updateSuccessorsPHIs()
547 MI.getOperand(Idx).setReg(Reg); in updateSuccessorsPHIs()
H A DModuloSchedule.cpp354 O.setReg(ToReg); in replaceRegUsesAfterLoop()
1061 MO.setReg(NewReg); in updateInstruction()
1077 MO.setReg(It->second); in updateInstruction()
1210 UseOp.setReg(ReplaceReg); in rewriteScheduledInstr()
1216 UseOp.setReg(SplitReg); in rewriteScheduledInstr()
1360 MO.setReg(Reg); in rewrite()
1514 MI->getOperand(1).setReg(*InitReg); in phi()
1705 MI.getOperand(0).setReg(PhiReg); in moveStageBetweenBlocks()
1719 NewMI->getOperand(0).setReg(R); in moveStageBetweenBlocks()
1720 NewMI->getOperand(1).setReg(OrigR); in moveStageBetweenBlocks()
[all …]
H A DBreakFalseDeps.cpp147 MO.setReg(CurrMO.getReg()); in pickBestRegisterForUndef()
169 MO.setReg(MaxClearanceReg); in pickBestRegisterForUndef()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXFMAMutate.cpp238 MI.getOperand(0).setReg(KilledProdReg); in processBlock()
239 MI.getOperand(1).setReg(KilledProdReg); in processBlock()
240 MI.getOperand(3).setReg(AddendSrcReg); in processBlock()
257 MI.getOperand(2).setReg(AddendSrcReg); in processBlock()
262 MI.getOperand(2).setReg(OtherProdReg); in processBlock()
H A DPPCVSXCopy.cpp104 SrcMO.setReg(NewVReg); in processBlock()
123 SrcMO.setReg(NewVReg); in processBlock()
H A DPPCMIPeephole.cpp521 MO.setReg(PPC::NoRegister); in simplifyCode()
720 MI.getOperand(1).setReg(DefReg1); in simplifyCode()
721 MI.getOperand(2).setReg(DefReg2); in simplifyCode()
760 DefMI->getOperand(0).setReg(MI.getOperand(0).getReg()); in simplifyCode()
860 MI.getOperand(OpNo).setReg(ShiftOp1); in simplifyCode()
903 Use.getOperand(i).setReg(ConvReg1); in simplifyCode()
972 SrcMI->getOperand(0).setReg(MI.getOperand(0).getReg()); in simplifyCode()
1044 SrcMI->getOperand(0).setReg(MI.getOperand(0).getReg()); in simplifyCode()
1276 MI.getOperand(1).setReg(SrcMI->getOperand(1).getReg()); in simplifyCode()
1837 CMPI2->getOperand(1).setReg(Op2); in eliminateRedundantCompare()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonTfrCleanup.cpp61 void setReg(unsigned R32, uint32_t V32, ImmediateMap &IMap);
82 void HexagonTfrCleanup::setReg(unsigned R32, uint32_t V32, ImmediateMap &IMap) { in setReg() function in HexagonTfrCleanup
144 setReg(TRI->getSubReg(DefR, isub_lo), VL, IMap); in updateImmMap()
145 setReg(TRI->getSubReg(DefR, isub_hi), VH, IMap); in updateImmMap()
147 setReg(DefR, Val, IMap); in updateImmMap()
H A DHexagonAsmPrinter.cpp382 Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI)); in HexagonProcessInstruction()
393 Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI)); in HexagonProcessInstruction()
405 Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI)); in HexagonProcessInstruction()
417 Rs.setReg(getHexagonRegisterPair(Rs.getReg(), RI)); in HexagonProcessInstruction()
543 MO.setReg(High); in HexagonProcessInstruction()
555 MO.setReg(High); in HexagonProcessInstruction()
569 MO.setReg(High); in HexagonProcessInstruction()
602 Rt.setReg(getHexagonRegisterPair(Rt.getReg(), RI)); in HexagonProcessInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegBankLegalizeHelper.cpp786 Op.setReg(NewDst); in applyMappingDst()
798 Op.setReg(NewVgprDst); in applyMappingDst()
811 Op.setReg(NewVgprDst); in applyMappingDst()
820 Op.setReg(NewDst); in applyMappingDst()
855 Op.setReg(CopyVcc_Scc.getReg(0)); in applyMappingSrc()
905 Op.setReg(CopyToVgpr.getReg(0)); in applyMappingSrc()
922 Op.setReg(CopyToVgpr.getReg(0)); in applyMappingSrc()
932 Op.setReg(Aext.getReg(0)); in applyMappingSrc()
944 Op.setReg(BoolInReg.getReg(0)); in applyMappingSrc()
951 Op.setReg(Sext.getReg(0)); in applyMappingSrc()
[all …]
H A DAMDGPURegBankSelect.cpp138 DefOP.setReg(NewReg); in reAssignRegBankOnDef()
158 Op.setReg(NewReg); in reAssignRegBankOnDef()
174 UseOP.setReg(NewReg); in constrainRegBankUse()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyDebugValueManager.cpp372 Clone->getOperand(0).setReg(NewReg); in cloneSink()
390 MO.setReg(NewReg); in cloneSink()
398 MO.setReg(Reg); in updateReg()
400 Def->getOperand(0).setReg(Reg); in updateReg()
H A DWebAssemblyPeephole.cpp68 MO.setReg(NewReg); in maybeRewriteToDrop()
103 MO.setReg(NewReg); in maybeRewriteToFallthrough()
H A DWebAssemblyFixBrTableDefaults.cpp67 MI.getOperand(0).setReg(ExtMI->getOperand(1).getReg()); in fixBrTableIndex()
79 MI.getOperand(0).setReg(Reg32); in fixBrTableIndex()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DAntiDepBreaker.h63 MI.getDebugOperand(0).setReg(NewReg); in UpdateDbgValue()
67 MI.getOperand(0).setReg(NewReg); in UpdateDbgValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZCopyPhysRegs.cpp83 MI->getOperand(1).setReg(Tmp); in visitMBB()
89 MI->getOperand(0).setReg(Tmp); in visitMBB()
H A DSystemZPostRewrite.cpp135 Src1MO.setReg(DestReg); in selectSELRMux()
142 Src2MO.setReg(DestReg); in selectSELRMux()
246 SrcMO.setReg(DstReg); in selectMI()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMVETPAndVPTOptimisationsPass.cpp398 LoopPhi->getOperand(3).setReg(StartReg); in MergeLoopEnd()
399 LoopPhi->getOperand(1).setReg(DecReg); in MergeLoopEnd()
401 LoopPhi->getOperand(1).setReg(StartReg); in MergeLoopEnd()
402 LoopPhi->getOperand(3).setReg(DecReg); in MergeLoopEnd()
537 MI->getOperand(Idx + 2).setReg(LR); in ConvertTailPredLoop()
639 User.setReg(NewResult); in ReplaceRegisterUseWithVPNOT()
807 MO->setReg(LastVPNOTResult); in ReduceOldVCCRValueUses()
963 Instr.getOperand(PIdx + 1).setReg(LastVPTReg); in ReplaceConstByVPNOTs()
981 Instr.getOperand(PIdx + 1).setReg(NewVPR); in ReplaceConstByVPNOTs()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DDelaySlotFiller.cpp415 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
454 OrMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreOR()
488 RestoreMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreSETHIi()
489 RestoreMI->getOperand(1).setReg(SP::G0); in combineRestoreSETHIi()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86LowerTileCopy.cpp142 MO->setReg(GR64Cand ? GR64Cand : X86::RAX); in runOnMachineFunction()
149 MO->setReg(GR64Cand ? GR64Cand : X86::RAX); in runOnMachineFunction()
H A DX86InstrBuilder.h131 MI->getOperand(Operand + 2).setReg(0); in setDirectAddressInInstr()
133 MI->getOperand(Operand + 4).setReg(0); in setDirectAddressInInstr()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1472 MO.setReg(RegPair.first); in processInstruction()
1483 MO.setReg(RegPair.first); in processInstruction()
1495 MO.setReg(RegPair.first); in processInstruction()
1507 MO.setReg(RegPair.first); in processInstruction()
1821 Rss.setReg(matchRegister(Reg1)); in processInstruction()
1847 Rs.setReg(matchRegister(RegPair)); in processInstruction()
1852 Rs.setReg(matchRegister(RegPair)); in processInstruction()
1864 Rs.setReg(matchRegister(RegPair)); in processInstruction()
1869 Rs.setReg(matchRegister(RegPair)); in processInstruction()
1881 Rt.setReg(matchRegister(RegPair)); in processInstruction()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLocalizer.cpp137 LocalizedMI->getOperand(0).setReg(NewReg); in localizeInterBlock()
145 MOUse.setReg(NewVRegIt->second); in localizeInterBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsOptimizePICCall.cpp157 I->getOperand(0).setReg(DstReg); in setCallTargetReg()
248 getCallTargetRegOpnd(*I)->setReg(getReg(Entry)); in visitNode()

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