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Searched refs:schedulers (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/netbsd-tests/lib/libc/gen/posix_spawn/
H A Dt_spawnattr.c48 static const int schedulers[] = { variable
62 for (i = 0; i < __arraycount(schedulers); i++) { in get_different_scheduler()
63 if (schedulers[i] == scheduler) in get_different_scheduler()
66 ATF_REQUIRE_MSG(i < __arraycount(schedulers), in get_different_scheduler()
71 if (i >= __arraycount(schedulers)) in get_different_scheduler()
73 return schedulers[i]; in get_different_scheduler()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ScheduleZnver3.td81 // There are total of three Units, each one with it's own schedulers.
110 // associated with the same schedulers as the AGUs.
164 // The schedulers can receive up to six macro ops per cycle, with a limit of
167 // FIXME: these are 4 separate schedulers, not a single big one.
182 // The processor uses <...> two decoupled independent floating point schedulers
332 // Agner, 21.8 Register renaming and out-of-order schedulers
344 // FIXME: those are two separate schedulers, not a single big one.
394 // as two micro-ops when dispatched by the schedulers.
H A DX86ScheduleZnver4.td100 // associated with the same schedulers as the AGUs.
154 // The schedulers can receive up to six macro ops per cycle, with a limit of
171 // The processor uses <...> two decoupled independent floating point schedulers
330 // Agner, 21.8 Register renaming and out-of-order schedulers
341 // FIXME: those are two separate schedulers, not a single big one.
391 // as two micro-ops when dispatched by the schedulers.
H A DX86ScheduleBtVer2.td118 // as two micro-ops when dispatched by the schedulers.
H A DX86ScheduleBdVer2.td187 // as two micro-ops when dispatched by the schedulers.
/freebsd/sys/netpfil/ipfw/
H A Ddummynet.txt52 association of flowsets and schedulers is configurable e.g.
173 schedulers and flowsets.
177 are attached to matching schedulers.
215 exported to the schedulers.
429 Then schedulers are wrote. If a scheduler has one or more scheduler instance,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedAmpere1.td38 // and 2 memory) issue into. The integer and FP schedulers can each issue
39 // one uop per cycle, while the memory schedulers can each issue one load
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleSwift.td15 // required until SD and PostRA schedulers are replaced by MachineScheduler.
H A DARMScheduleA9.td15 // required until SD and PostRA schedulers are replaced by MachineScheduler.
/freebsd/contrib/one-true-awk/testdir/
H A Dfunstack.in20798 …ved. The abstract model provides a framework for implementing flexible schedulers in real operatin…
23746 …amic schedulers are shown to improve system performance (as measured by user CPU time) over that g…
23752 …ment; computer systems programming; computer systems, digital; dynamic schedulers; feedback schedu…