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Searched refs:regval (Results 1 – 25 of 50) sorted by relevance

12

/freebsd/sys/amd64/amd64/
H A Dgdb_machdep.c93 register_t regval = *(register_t *)val; in gdb_cpu_setreg() local
101 case GDB_REG_RAX: kdb_frame->tf_rax = regval; break; in gdb_cpu_setreg()
102 case GDB_REG_RBX: kdb_frame->tf_rbx = regval; break; in gdb_cpu_setreg()
103 case GDB_REG_RCX: kdb_frame->tf_rcx = regval; break; in gdb_cpu_setreg()
104 case GDB_REG_RDX: kdb_frame->tf_rdx = regval; break; in gdb_cpu_setreg()
105 case GDB_REG_RSI: kdb_frame->tf_rsi = regval; break; in gdb_cpu_setreg()
106 case GDB_REG_RDI: kdb_frame->tf_rdi = regval; break; in gdb_cpu_setreg()
107 case GDB_REG_RBP: kdb_frame->tf_rbp = regval; break; in gdb_cpu_setreg()
108 case GDB_REG_RSP: kdb_frame->tf_rsp = regval; break; in gdb_cpu_setreg()
109 case GDB_REG_R8: kdb_frame->tf_r8 = regval; break; in gdb_cpu_setreg()
[all …]
/freebsd/sys/riscv/riscv/
H A Dgdb_machdep.c85 register_t regval = *(register_t *)val; in gdb_cpu_setreg() local
90 case GDB_REG_PC: kdb_frame->tf_sepc = regval; break; in gdb_cpu_setreg()
91 case GDB_REG_RA: kdb_frame->tf_ra = regval; break; in gdb_cpu_setreg()
92 case GDB_REG_SP: kdb_frame->tf_sp = regval; break; in gdb_cpu_setreg()
93 case GDB_REG_GP: kdb_frame->tf_gp = regval; break; in gdb_cpu_setreg()
94 case GDB_REG_TP: kdb_frame->tf_tp = regval; break; in gdb_cpu_setreg()
95 case GDB_REG_FP: kdb_frame->tf_s[0] = regval; break; in gdb_cpu_setreg()
96 case GDB_REG_S1: kdb_frame->tf_s[1] = regval; break; in gdb_cpu_setreg()
97 case GDB_REG_SSTATUS: kdb_frame->tf_sstatus = regval; break; in gdb_cpu_setreg()
98 case GDB_REG_STVAL: kdb_frame->tf_stval = regval; break; in gdb_cpu_setreg()
[all …]
/freebsd/sys/dev/ath/ath_hal/ar9002/
H A Dar9285_phy.c45 uint32_t regval; in ar9285_antdiv_comb_conf_get() local
47 regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ar9285_antdiv_comb_conf_get()
48 antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >> in ar9285_antdiv_comb_conf_get()
50 antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >> in ar9285_antdiv_comb_conf_get()
52 antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >> in ar9285_antdiv_comb_conf_get()
60 uint32_t regval; in ar9285_antdiv_comb_conf_set() local
62 regval = OS_REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ar9285_antdiv_comb_conf_set()
63 regval &= ~(AR_PHY_9285_ANT_DIV_MAIN_LNACONF | in ar9285_antdiv_comb_conf_set()
66 regval |= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S) in ar9285_antdiv_comb_conf_set()
68 regval |= ((antconf->alt_lna_conf << AR_PHY_9285_ANT_DIV_ALT_LNACONF_S) in ar9285_antdiv_comb_conf_set()
[all …]
H A Dar9287_reset.c457 uint32_t regChainOffset, regval; in ar9287SetBoardValues() local
543 regval = OS_REG_READ(ah, AR9287_AN_RF2G3_CH0); in ar9287SetBoardValues()
544 regval &= ~(AR9287_AN_RF2G3_DB1 | in ar9287SetBoardValues()
550 regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) | in ar9287SetBoardValues()
558 OS_A_REG_WRITE(ah, AR9287_AN_RF2G3_CH0, regval); in ar9287SetBoardValues()
560 regval = OS_REG_READ(ah, AR9287_AN_RF2G3_CH1); in ar9287SetBoardValues()
561 regval &= ~(AR9287_AN_RF2G3_DB1 | in ar9287SetBoardValues()
567 regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) | in ar9287SetBoardValues()
574 OS_A_REG_WRITE(ah, AR9287_AN_RF2G3_CH1, regval); in ar9287SetBoardValues()
H A Dar9280_olc.c132 int delta, currPDADC, regval; in ar9280olcTemperatureCompensation() local
161 regval = AH9280(ah)->originalGain[i] - delta; in ar9280olcTemperatureCompensation()
162 if (regval < 0) in ar9280olcTemperatureCompensation()
163 regval = 0; in ar9280olcTemperatureCompensation()
167 AR_PHY_TX_GAIN, regval); in ar9280olcTemperatureCompensation()
/freebsd/sys/arm64/arm64/
H A Dgdb_machdep.c80 register_t regval = *(register_t *)val; in gdb_cpu_setreg() local
85 case GDB_REG_PC: kdb_frame->tf_elr = regval; break; in gdb_cpu_setreg()
86 case GDB_REG_SP: kdb_frame->tf_sp = regval; break; in gdb_cpu_setreg()
89 kdb_frame->tf_x[regnum] = regval; in gdb_cpu_setreg()
96 case GDB_REG_LR: kdb_thrctx->pcb_x[PCB_LR] = regval; break; in gdb_cpu_setreg()
97 case GDB_REG_SP: kdb_thrctx->pcb_sp = regval; break; in gdb_cpu_setreg()
100 kdb_thrctx->pcb_x[regnum - GDB_REG_X19] = regval; in gdb_cpu_setreg()
/freebsd/sys/arm/ti/am335x/
H A Dam335x_ehrpwm.c218 uint16_t regval; in am335x_ehrpwm_cfg_enable() local
227 regval = EPWM_READ2(sc, EPWM_AQCSFRC); in am335x_ehrpwm_cfg_enable()
228 regval &= ~AQCSFRC(chan, AQCSFRC_MASK); in am335x_ehrpwm_cfg_enable()
231 regval |= AQCSFRC(chan, AQCSFRC_HI); in am335x_ehrpwm_cfg_enable()
233 regval |= AQCSFRC(chan, AQCSFRC_LO); in am335x_ehrpwm_cfg_enable()
235 EPWM_WRITE2(sc, EPWM_AQCSFRC, regval); in am335x_ehrpwm_cfg_enable()
241 uint16_t regval; in am335x_ehrpwm_cfg_period() local
287 regval = EPWM_READ2(sc, EPWM_TBCTL); in am335x_ehrpwm_cfg_period()
288 regval &= ~(TBCTL_CLKDIV_MASK | TBCTL_HSPCLKDIV_MASK); in am335x_ehrpwm_cfg_period()
289 regval |= TBCTL_CLKDIV(clkdiv) | TBCTL_HSPCLKDIV(hspclkdiv); in am335x_ehrpwm_cfg_period()
[all …]
/freebsd/sys/powerpc/mpc85xx/
H A Dlbc.c284 uint32_t regval; in lbc_banks_enable() local
295 regval = sc->sc_banks[i].addr; in lbc_banks_enable()
298 regval |= (1 << 11); in lbc_banks_enable()
301 regval |= (2 << 11); in lbc_banks_enable()
304 regval |= (3 << 11); in lbc_banks_enable()
310 regval |= (sc->sc_banks[i].decc << 9); in lbc_banks_enable()
311 regval |= (sc->sc_banks[i].wp << 8); in lbc_banks_enable()
312 regval |= (sc->sc_banks[i].msel << 5); in lbc_banks_enable()
313 regval |= (sc->sc_banks[i].atom << 2); in lbc_banks_enable()
314 regval |= 1; in lbc_banks_enable()
[all …]
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_mci.c934 uint32_t regval; in ar9300_mci_set_btcoex_ctrl_9565_1ANT() local
937 regval = SM(1, AR_BTCOEX_CTRL_JUPITER_MODE) | in ar9300_mci_set_btcoex_ctrl_9565_1ANT()
949 OS_REG_WRITE(ah, AR_BTCOEX_CTRL, regval); in ar9300_mci_set_btcoex_ctrl_9565_1ANT()
954 uint32_t regval; in ar9300_mci_set_btcoex_ctrl_9565_2ANT() local
957 regval = SM(1, AR_BTCOEX_CTRL_JUPITER_MODE) | in ar9300_mci_set_btcoex_ctrl_9565_2ANT()
969 OS_REG_WRITE(ah, AR_BTCOEX_CTRL, regval); in ar9300_mci_set_btcoex_ctrl_9565_2ANT()
974 uint32_t regval; in ar9300_mci_set_btcoex_ctrl_9462() local
977 regval = SM(1, AR_BTCOEX_CTRL_JUPITER_MODE) | in ar9300_mci_set_btcoex_ctrl_9462()
988 regval |= SM(1, AR_BTCOEX_CTRL_SPDT_ENABLE_10); in ar9300_mci_set_btcoex_ctrl_9462()
991 OS_REG_WRITE(ah, AR_BTCOEX_CTRL, regval); in ar9300_mci_set_btcoex_ctrl_9462()
[all …]
H A Dar9300_eeprom.c1638 u_int32_t regval; in ar9300_ant_ctrl_apply() local
1743 regval = OS_REG_READ(ah, AR_PHY_MC_GAIN_CTRL); in ar9300_ant_ctrl_apply()
1744 regval &= (~ANT_DIV_CONTROL_ALL); /* clear bit 25~30 */ in ar9300_ant_ctrl_apply()
1745 regval |= (value & 0x3f) << ANT_DIV_CONTROL_ALL_S; in ar9300_ant_ctrl_apply()
1747 regval &= (~MULTICHAIN_GAIN_CTRL__ENABLE_ANT_DIV_LNADIV__MASK); in ar9300_ant_ctrl_apply()
1748 regval |= ((value >> 6) & 0x1) << in ar9300_ant_ctrl_apply()
1752 regval |= ANT_DIV_ENABLE; in ar9300_ant_ctrl_apply()
1756 regval |= (1 << MULTICHAIN_GAIN_CTRL__ENABLE_ANT_SW_RX_PROT__SHIFT); in ar9300_ant_ctrl_apply()
1765 regval &= ~(1 << MULTICHAIN_GAIN_CTRL__ENABLE_ANT_DIV_LNADIV__SHIFT); in ar9300_ant_ctrl_apply()
1766 regval &= ~(1 << MULTICHAIN_GAIN_CTRL__ENABLE_ANT_SW_RX_PROT__SHIFT); in ar9300_ant_ctrl_apply()
[all …]
H A Dar9300_reset.c133 u_int32_t tx_lat, rx_lat, usec, slot, regval, eifs; in ar9300_set_ifs_timing() local
135 regval = OS_REG_READ(ah, AR_USEC); in ar9300_set_ifs_timing()
136 regval &= ~(AR_USEC_RX_LATENCY | AR_USEC_TX_LATENCY | AR_USEC_USEC); in ar9300_set_ifs_timing()
163 OS_REG_WRITE(ah, AR_USEC, (usec | regval | tx_lat | rx_lat)); in ar9300_set_ifs_timing()
4051 u_int32_t regval; in ar9300_set_dma() local
4060 regval = OS_REG_READ(ah, AR_AHB_MODE); in ar9300_set_dma()
4061 OS_REG_WRITE(ah, AR_AHB_MODE, regval | AR_AHB_PREFETCH_RD_EN); in ar9300_set_dma()
4067 regval = OS_REG_READ(ah, AR_TXCFG) & ~AR_TXCFG_DMASZ_MASK; in ar9300_set_dma()
4068 OS_REG_WRITE(ah, AR_TXCFG, regval | AR_TXCFG_DMASZ_128B); in ar9300_set_dma()
4088 regval = OS_REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_DMASZ_MASK; in ar9300_set_dma()
[all …]
/freebsd/sys/dev/ixgbe/
H A Dixgbe_82598.c256 u32 regval; in ixgbe_start_hw_82598() local
269 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); in ixgbe_start_hw_82598()
270 regval &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; in ixgbe_start_hw_82598()
271 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), regval); in ixgbe_start_hw_82598()
276 regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); in ixgbe_start_hw_82598()
277 regval &= ~(IXGBE_DCA_RXCTRL_DATA_WRO_EN | in ixgbe_start_hw_82598()
279 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval); in ixgbe_start_hw_82598()
1364 u32 regval; in ixgbe_enable_relaxed_ordering_82598() local
1372 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); in ixgbe_enable_relaxed_ordering_82598()
1373 regval |= IXGBE_DCA_TXCTRL_DESC_WRO_EN; in ixgbe_enable_relaxed_ordering_82598()
[all …]
H A Dixgbe_82598.h53 s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval);
H A Dixgbe_82599.h62 s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval);
/freebsd/sys/arm64/cavium/
H A Dthunder_pcie_pem.c479 uint64_t regval; in thunder_pem_slix_s2m_regx_acc_modify() local
493 regval = bus_space_read_8(sc->reg_bst, handle, in thunder_pem_slix_s2m_regx_acc_modify()
495 regval &= ~(0xFFFFFFFFUL); in thunder_pem_slix_s2m_regx_acc_modify()
497 PEM_CFG_SLIX_TO_REG(slix), regval); in thunder_pem_slix_s2m_regx_acc_modify()
504 uint64_t regval; in thunder_pem_link_init() local
507 regval = bus_space_read_8(sc->reg_bst, sc->reg_bsh, PEM_ON_REG); in thunder_pem_link_init()
508 if ((regval & PEM_CFG_LINK_MASK) != PEM_CFG_LINK_RDY) { in thunder_pem_link_init()
513 regval = bus_space_read_8(sc->reg_bst, sc->reg_bsh, PEM_CTL_STATUS); in thunder_pem_link_init()
514 regval |= PEM_LINK_ENABLE; in thunder_pem_link_init()
515 bus_space_write_8(sc->reg_bst, sc->reg_bsh, PEM_CTL_STATUS, regval); in thunder_pem_link_init()
[all …]
/freebsd/sys/dev/e1000/
H A De1000_ich8lan.c164 u16 regval; member
177 u16 regval; member
188 u16 regval; member
3693 hsfsts.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFSTS); in e1000_flash_cycle_init_ich8lan()
3706 hsfsts.regval & 0xFFFF); in e1000_flash_cycle_init_ich8lan()
3708 E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFSTS, hsfsts.regval); in e1000_flash_cycle_init_ich8lan()
3726 hsfsts.regval & 0xFFFF); in e1000_flash_cycle_init_ich8lan()
3729 hsfsts.regval); in e1000_flash_cycle_init_ich8lan()
3738 hsfsts.regval = E1000_READ_FLASH_REG16(hw, in e1000_flash_cycle_init_ich8lan()
3753 hsfsts.regval & 0xFFFF); in e1000_flash_cycle_init_ich8lan()
[all …]
/freebsd/sys/arm/ti/
H A Dti_sdhci.c419 uint32_t regval; in ti_sdhci_hw_init() local
495 regval = ti_mmchs_read_4(sc, MMCHS_SD_CAPA); in ti_sdhci_hw_init()
497 regval |= MMCHS_SD_CAPA_VS18; in ti_sdhci_hw_init()
499 regval |= MMCHS_SD_CAPA_VS30; in ti_sdhci_hw_init()
500 ti_mmchs_write_4(sc, MMCHS_SD_CAPA, regval); in ti_sdhci_hw_init()
/freebsd/sys/amd64/vmm/intel/
H A Dvmx.c1819 vmx_set_guest_reg(struct vmx_vcpu *vcpu, int ident, uint64_t regval) in vmx_set_guest_reg() argument
1827 vmxctx->guest_rax = regval; in vmx_set_guest_reg()
1830 vmxctx->guest_rcx = regval; in vmx_set_guest_reg()
1833 vmxctx->guest_rdx = regval; in vmx_set_guest_reg()
1836 vmxctx->guest_rbx = regval; in vmx_set_guest_reg()
1839 vmcs_write(VMCS_GUEST_RSP, regval); in vmx_set_guest_reg()
1842 vmxctx->guest_rbp = regval; in vmx_set_guest_reg()
1845 vmxctx->guest_rsi = regval; in vmx_set_guest_reg()
1848 vmxctx->guest_rdi = regval; in vmx_set_guest_reg()
1851 vmxctx->guest_r8 = regval; in vmx_set_guest_reg()
[all …]
/freebsd/sys/dev/ffec/
H A Dif_ffec.c1104 uint32_t maxbuf, maxfl, regval; in ffec_init_locked()
1230 regval = RD4(sc, FEC_MIBC_REG); in ffec_init_locked()
1231 WR4(sc, FEC_MIBC_REG, regval | FEC_MIBC_DIS); in ffec_init_locked()
1233 WR4(sc, FEC_MIBC_REG, regval & ~FEC_MIBC_DIS); in ffec_init_locked()
1239 regval = RD4(sc, FEC_RACC_REG); in ffec_init_locked()
1240 WR4(sc, FEC_RACC_REG, regval | FEC_RACC_SHIFT16); in ffec_init_locked()
1252 regval = RD4(sc, FEC_ECR_REG); in ffec_init_locked()
1254 regval |= FEC_ECR_DBSWP; in ffec_init_locked()
1256 regval |= FEC_ECR_ETHEREN; in ffec_init_locked()
1257 WR4(sc, FEC_ECR_REG, regval); in ffec_init_locked()
1103 uint32_t maxbuf, maxfl, regval; ffec_init_locked() local
[all...]
/freebsd/sys/dev/liquidio/base/
H A Dcn23xx_pf_device.c77 uint32_t corrtable_err_status, uncorrectable_err_mask, regval; in lio_cn23xx_pf_enable_error_reporting() local
79 regval = lio_read_pci_cfg(oct, LIO_CN23XX_CFG_PCIE_DEVCTL); in lio_cn23xx_pf_enable_error_reporting()
80 if (regval & LIO_CN23XX_CFG_PCIE_DEVCTL_MASK) { in lio_cn23xx_pf_enable_error_reporting()
93 regval, uncorrectable_err_mask, in lio_cn23xx_pf_enable_error_reporting()
97 regval |= 0xf; /* Enable Link error reporting */ in lio_cn23xx_pf_enable_error_reporting()
100 lio_write_pci_cfg(oct, LIO_CN23XX_CFG_PCIE_DEVCTL, regval); in lio_cn23xx_pf_enable_error_reporting()
/freebsd/sys/dev/cxgb/common/
H A Dcxgb_vsc8211.c397 unsigned int regval; in t3_vsc8211_fifo_depth() local
421 regval = V_VSC8211_TXFIFODEPTH(val) | V_VSC8211_RXFIFODEPTH(val) | in t3_vsc8211_fifo_depth()
425 return mdio_write(phy, 0, VSC8211_PHY_CTRL, regval); in t3_vsc8211_fifo_depth()
/freebsd/sys/dev/bhnd/cores/chipc/
H A Dchipc.c442 uint32_t regval; in chipc_read_caps() local
474 regval = bhnd_bus_read_4(sc->core, CHIPC_OTPLAYOUT); in chipc_read_caps()
475 caps->otp_size = CHIPC_GET_BITS(regval, CHIPC_OTPL_SIZE); in chipc_read_caps()
495 regval = bhnd_bus_read_4(sc->core, CHIPC_FLASH_CFG); in chipc_read_caps()
496 if (CHIPC_GET_FLAG(regval, CHIPC_FLASH_CFG_DS)) in chipc_read_caps()
526 regval = bhnd_bus_read_4(sc->core, CHIPC_OTPLAYOUT); in chipc_read_caps()
527 caps->sprom_offset = CHIPC_GET_BITS(regval, CHIPC_OTPL_GUP); in chipc_read_caps()
/freebsd/sys/contrib/dev/rtw88/
H A Drtw8821c.c882 u8 regval = 0; in rtw8821c_coex_cfg_ant_switch()
916 regval = 0x3;
918 regval = (!polarity_inverse ? 0x2 : 0x1); in rtw8821c_coex_cfg_rfe_type()
920 regval = (!polarity_inverse ? 0x2 : 0x1); in rtw8821c_coex_cfg_rfe_type()
922 regval = (!polarity_inverse ? 0x1 : 0x2); in rtw8821c_coex_cfg_rfe_type()
926 regval); in rtw8821c_coex_cfg_rfe_type()
935 regval = (!polarity_inverse ? 0x2 : 0x1); in rtw8821c_coex_cfg_rfe_type()
937 regval); in rtw8821c_coex_cfg_rfe_type()
948 regval = (!polarity_inverse ? 0x0 : 0x1); in rtw8821c_coex_cfg_rfe_type()
950 regval); in rtw8821c_coex_cfg_rfe_type()
815 u8 regval = 0; rtw8821c_coex_cfg_ant_switch() local
[all...]
/freebsd/sys/dev/vmm/
H A Dvmm_dev.c300 uint64_t *regval) in vm_get_register_set() argument
306 error = vm_get_register(vcpu, regnum[i], &regval[i]); in vm_get_register_set()
315 uint64_t *regval) in vm_set_register_set() argument
321 error = vm_set_register(vcpu, regnum[i], regval[i]); in vm_set_register_set()
523 error = vm_get_register(vcpu, vmreg->regnum, &vmreg->regval); in vmmdev_ioctl()
530 error = vm_set_register(vcpu, vmreg->regnum, vmreg->regval); in vmmdev_ioctl()
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/gdb-remote/
H A DThreadGDBRemote.cpp335 bool ThreadGDBRemote::PrivateSetRegisterValue(uint32_t reg, uint64_t regval) { in PrivateSetRegisterValue() argument
339 return gdb_reg_ctx->PrivateSetRegisterValue(reg, regval); in PrivateSetRegisterValue()

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