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Searched refs:ref_clk (Results 1 – 25 of 70) sorted by relevance

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/freebsd/sys/contrib/dev/athk/ath10k/
H A Dahb.c96 ar_ahb->ref_clk = devm_clk_get(dev, "wifi_wcss_ref"); in ath10k_ahb_clock_init()
97 if (IS_ERR_OR_NULL(ar_ahb->ref_clk)) { in ath10k_ahb_clock_init()
99 PTR_ERR(ar_ahb->ref_clk)); in ath10k_ahb_clock_init()
100 return ar_ahb->ref_clk ? PTR_ERR(ar_ahb->ref_clk) : -ENODEV; in ath10k_ahb_clock_init()
118 ar_ahb->ref_clk = NULL; in ath10k_ahb_clock_deinit()
128 IS_ERR_OR_NULL(ar_ahb->ref_clk) || in ath10k_ahb_clock_enable()
141 ret = clk_prepare_enable(ar_ahb->ref_clk); in ath10k_ahb_clock_enable()
156 clk_disable_unprepare(ar_ahb->ref_clk); in ath10k_ahb_clock_enable()
171 clk_disable_unprepare(ar_ahb->ref_clk); in ath10k_ahb_clock_disable()
H A Dahb.h22 struct clk *ref_clk; member
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Drockchip,dwc3.txt8 "ref_clk" Controller reference clk, have to be 24 MHz
28 clock-names = "ref_clk", "suspend_clk",
45 clock-names = "ref_clk", "suspend_clk",
H A Ddwc3-xilinx.txt11 "ref_clk" Clock source to core during PHY power down
38 clock-names = "bus_clk", "ref_clk";
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dcs2000-cp.txt8 - clock-names: CLK_IN : clk_in, XTI/REF_CLK : ref_clk
20 clock-names = "clk_in", "ref_clk";
/freebsd/sys/contrib/device-tree/Bindings/fpga/
H A Dxilinx-zynq-fpga-mgr.txt8 - clock-names: name for the clock, should be "ref_clk"
17 clock-names = "ref_clk";
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dspi-zynq-qspi.txt9 - clock-names : List of input clock names - "ref_clk", "pclk"
22 clock-names = "ref_clk", "pclk";
H A Dspi-zynqmp-qspi.txt9 - clock-names : List of input clock names - "ref_clk", "pclk"
19 clock-names = "ref_clk", "pclk";
H A Djcore,spi.txt15 - clocks: If a phandle named "ref_clk" is present, SPI clock speed
33 clock-names = "ref_clk";
H A Dspi-cadence.txt9 - clock-names : List of input clock names - "ref_clk", "pclk"
23 clock-names = "ref_clk", "pclk";
/freebsd/sys/dev/iicbus/controller/cadence/
H A Dcdnc_i2c.c91 clk_t ref_clk; member
560 else if (clk_get_by_ofw_index(dev, node, 0, &sc->ref_clk) == 0) { in cdnc_i2c_attach()
561 if ((err = clk_enable(sc->ref_clk)) != 0) in cdnc_i2c_attach()
564 else if ((err = clk_get_freq(sc->ref_clk, &freq)) != 0) in cdnc_i2c_attach()
631 if (sc->ref_clk != NULL) { in cdnc_i2c_detach()
632 clk_release(sc->ref_clk); in cdnc_i2c_detach()
633 sc->ref_clk = NULL; in cdnc_i2c_detach()
/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Dcdns,rtc.txt12 - ref_clk: reference 1Hz or 100Hz clock, depending on IP configuration
20 clock-names = "pclk", "ref_clk";
/freebsd/sys/contrib/device-tree/Bindings/ufs/
H A Dufs-qcom.txt23 order as the clocks property. "ref_clk_src", "ref_clk",
30 - vddp-ref-clk-supply : phandle to UFS device ref_clk pad power supply
47 "ref_clk",
H A Dufs-hisi.txt16 order as the clocks property. "ref_clk", "phy_clk" is optional
37 clock-names = "ref_clk", "phy_clk";
H A Dufshcd-pltfrm.txt43 "ref_clk" indicates reference clock frequency.
46 26 MHz, 38.4 MHz, 52MHz) for reference clock. This "ref_clk" entry is
83 clock-names = "core_clk", "ref_clk", "phy_clk", "iface_clk";
/freebsd/sys/arm64/rockchip/
H A Drk3568_combphy.c68 clk_t ref_clk; member
268 clk_get_freq(sc->ref_clk, &rate); in rk3568_combphy_enable()
396 if (clk_get_by_ofw_name(dev, 0, "ref", &sc->ref_clk)) { in rk3568_combphy_attach()
400 if (clk_enable(sc->ref_clk)) in rk3568_combphy_attach()
/freebsd/sys/contrib/device-tree/Bindings/clock/ti/davinci/
H A Dpll.txt59 clocks = <&ref_clk>, <&pll1_sysclk 3>;
83 clocks = <&ref_clk>;
/freebsd/sys/contrib/device-tree/src/arm/xilinx/
H A Dzynq-7000.dtsi218 clock-names = "ref_clk", "pclk";
230 clock-names = "ref_clk", "pclk";
241 clock-names = "ref_clk", "pclk";
372 clock-names = "ref_clk";
/freebsd/sys/contrib/device-tree/src/arm/ti/davinci/
H A Dda850-enbw-cmc.dts34 &ref_clk {
H A Dda850.dtsi82 ref_clk: ref_clk { label
85 clock-output-names = "ref_clk";
138 clocks = <&ref_clk>, <&pll1_sysclk 3>;
699 clocks = <&ref_clk>;
/freebsd/sys/contrib/device-tree/src/arm64/amd/
H A Delba.dtsi33 ref_clk: oscillator4 { label
138 clocks = <&ref_clk>;
H A Delba-asic-common.dtsi18 &ref_clk {
/freebsd/sys/contrib/device-tree/Bindings/iio/impedance-analyzer/
H A Dad5933.txt24 clocks = <&ref_clk>;
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dxilinx_axienet.txt49 ref_clk: Ethernet reference clock, used by signal delay
85 clock-names = "s_axi_lite_clk", "axis_clk", "ref_clk", "mgt_clk";
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dhihope-rev4.dtsi58 clock-names = "clk_in", "ref_clk";

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