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Searched refs:pseudos (Results 1 – 25 of 31) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrGISel.td1 //===-- RISCVInstrGISel.td - RISC-V GISel target pseudos ----*- tablegen -*-===//
H A DRISCVInstrInfoSFB.td9 // This file describes the pseudos for SFB (Short Forward Branch).
H A DRISCVInstrFormats.td244 // 1 -> default value for vector pseudos. not widening or narrowing.
H A DRISCVInstrInfoXqci.td1255 // Load/Store pseudos with QC.E.* Mnemonics. These expand to an AUIPC +
H A DRISCVInstrInfoV.td1258 // Handle signed with pseudos as well for more consistency in the
H A DRISCVInstrInfo.td477 // Condition code used by select and short forward branch pseudos.
/freebsd/contrib/lutok/api-docs/html/
H A Djquery.js2 …pseudos[e]||b.setFilters[e.toLowerCase()]||se.error("unsupported pseudo: "+e);return a[S]?a(o):1<a… property
8 …pseudos[r.toLowerCase()]=function(t){return!!y.data(t,r)},y[a]=y[a]||{},s=y[a][t],n=y[a][t]=functi… function
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonPseudo.td446 // Vector store pseudos
467 // Vector load pseudos
/freebsd/contrib/llvm-project/llvm/include/llvm/Passes/
H A DMachinePassRegistry.def134 MACHINE_FUNCTION_PASS("post-ra-pseudos", ExpandPostRAPseudosPass())
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64Combine.td335 // pseudos.
H A DAArch64Features.td598 // implemented this should tell the compiler to use the zeroing pseudos to
600 // lanes are known to be zero. The pseudos will then be expanded using the
609 : SubtargetFeature<"use-experimental-zeroing-pseudos",
H A DAArch64InstrGISel.td1 //=----- AArch64InstrGISel.td - AArch64 GISel target pseudos -*- tablegen -*-=//
H A DAArch64RegisterInfo.td276 // AUTH_TCRETURN* pseudos.
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16InstrInfo.td173 // Natural and pseudos are mixed together.
1032 // The Sel(T) instructions are pseudos
1393 // Mips16 pseudos
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.td16 // These pseudos carry values needed to compute the MaxcallFrameSize of the
544 // Memset[Length][Byte] pseudos.
610 // Store on condition. Expanded from CondStore* pseudos.
642 // Store on condition. Expanded from CondStore* pseudos.
2402 // is given as one less for these pseudos.
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.td1213 // These pseudos are combination of the OUT and ELPM instructions.
1512 // SP read/write pseudos.
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleSwift.td691 // Pre RA pseudos - load/store to a Q register as a D register pair.
H A DARMScheduleA57.td115 // To have "CompleteModel = 1", support of pseudos and special instructions
H A DARMInstrThumb.td1792 // See ARMInstrInfo.td. These two thumb specific pseudos are required to
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstructions.td266 // The operands of these pseudos should match V_CVT_F16_F32_t16_e64
932 // pseudos we avoid spills or copies being inserted within indirect sequences
1396 // GlobalISel shouldn't generate 64-bit addition pseudos.
H A DVOPInstructions.td217 …// The v_wmma pseudos have extra constraints that we do not want to impose on the real instruction.
H A DSOPInstructions.td1104 // FIXME: Should have separate pseudos for known may read MODE and
H A DBUFInstructions.td49 // BUF class (base class for MTBUF and MUBUF pseudos)
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsAMDGPU.td3568 // pseudos. So rather than create convergence tokens for these builtins, we
3572 // convergence control tokens. The corresponding MIR pseudos are marked as
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrCompiler.td164 // stack protection schemes. These are post-RA pseudos because we only know the

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