Searched refs:pll_type (Results 1 – 7 of 7) sorted by relevance
| /freebsd/sys/dev/bhnd/cores/chipc/pwrctl/ |
| H A D | bhnd_pwrctl_subr.c | 83 uint8_t pll_type, uint32_t *fixed_hz) in bhnd_pwrctl_si_clkreg_m() argument
85 switch (pll_type) { in bhnd_pwrctl_si_clkreg_m()
106 uint32_t pll_type, uint32_t n, uint32_t m) in bhnd_pwrctl_si_clock_rate() argument
110 KASSERT(bhnd_pwrctl_si_clkreg_m(cid, pll_type, NULL) != 0, in bhnd_pwrctl_si_clock_rate()
113 rate = bhnd_pwrctl_clock_rate(pll_type, n, m); in bhnd_pwrctl_si_clock_rate()
114 if (pll_type == CHIPC_PLL_TYPE3) in bhnd_pwrctl_si_clock_rate()
131 uint8_t pll_type, uint32_t *fixed_hz) in bhnd_pwrctl_cpu_clkreg_m() argument
133 switch (pll_type) { in bhnd_pwrctl_cpu_clkreg_m()
172 uint32_t pll_type, uint32_t n, uint32_t m) in bhnd_pwrctl_cpu_clock_rate() argument
174 KASSERT(bhnd_pwrctl_cpu_clkreg_m(cid, pll_type, NULL) != 0, in bhnd_pwrctl_cpu_clock_rate()
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| H A D | bhnd_pwrctlvar.h | 40 uint32_t bhnd_pwrctl_clock_rate(uint32_t pll_type, uint32_t n,
44 uint8_t pll_type, uint32_t *fixed_hz);
46 uint32_t pll_type, uint32_t n, uint32_t m);
49 uint8_t pll_type, uint32_t *fixed_hz);
51 uint32_t pll_type, uint32_t n, uint32_t m);
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| /freebsd/sys/dev/bhnd/cores/chipc/ |
| H A D | chipc.h | 77 uint8_t pll_type; /**< PLL type */ member
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| H A D | chipc_subr.c | 297 caps->pll_type, CC_TFS(jtag_master)); in chipc_print_caps()
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| H A D | chipc.c | 460 caps->pll_type = CHIPC_GET_BITS(cap_reg, CHIPC_CAP_PLL); in chipc_read_caps()
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| /freebsd/sys/arm/nvidia/tegra124/ |
| H A D | tegra124_clk_pll.c | 49 enum pll_type { enum
104 enum pll_type type;
388 enum pll_type type;
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| /freebsd/sys/arm64/nvidia/tegra210/ |
| H A D | tegra210_clk_pll.c | 52 enum pll_type { enum
131 enum pll_type type;
574 enum pll_type type;
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