| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | qoriq-clock.txt | 168 pll1: pll1@820 {
173 clock-output-names = "pll1", "pll1-div2";
180 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
181 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
189 clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
190 clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
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| H A D | renesas,r8a73a4-cpg-clocks.txt | 17 "pll0", "pll1", "pll2", "pll2s", "pll2h", "z", "z2", "i", "m3", "b",
29 clock-output-names = "main", "pll0", "pll1", "pll2",
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| H A D | renesas,sh73a0-cpg-clocks.txt | 19 "pll0", "pll1", "pll2", "pll3", "dsi0phy", "dsi1phy", "zg", "m3", "b",
31 clock-output-names = "main", "pll0", "pll1", "pll2",
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| H A D | silabs,si5351.txt | 82 /* connect xtal input as source of pll0 and pll1 */
105 * - pll1 as clock source of multisynth1
107 * - multisynth1 can change pll1
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| H A D | prima2-clock.txt | 17 pll1 2
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ti/davinci/ |
| H A D | pll.txt | 10 - "ti,da850-pll1" for PLL1 on DA850/OMAP-L138/AM18XX
15 - for "ti,da850-pll1", shall be "clksrc"
80 pll1: clock-controller@21a000 {
81 compatible = "ti,da850-pll1";
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| /freebsd/sys/contrib/device-tree/Bindings/clock/st/ |
| H A D | st,clkgen-pll.txt | 15 "st,clkgen-pll1"
16 "st,clkgen-pll1-c0"
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| /freebsd/sys/contrib/device-tree/src/arm/st/ |
| H A D | stih410-clock.dtsi | 101 clk_s_c0_pll1: clk-s-c0-pll1 {
103 compatible = "st,clkgen-pll1-c0";
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| H A D | stih418-clock.dtsi | 101 clk_s_c0_pll1: clk-s-c0-pll1 {
103 compatible = "st,clkgen-pll1-c0";
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| H A D | stih407-clock.dtsi | 96 clk_s_c0_pll1: clk-s-c0-pll1 {
98 compatible = "st,clkgen-pll1-c0";
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| H A D | ste-nomadik-stn8815.dtsi | 219 pll1: pll1@0 { label
230 clocks = <&pll1>;
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| /freebsd/sys/arm/nvidia/drm2/ |
| H A D | tegra_hdmi.c | 130 uint32_t pll1; member
142 .pll1 = 0x00301B00,
151 .pll1 = 0x00301500,
160 .pll1 = 0x00301500,
169 .pll1 = 0x00300F00,
651 WR4(sc, HDMI_NV_PDISP_SOR_PLL1, tmds->pll1); in tmds_init()
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| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | dra72x.dtsi | 72 reg-names = "dss", "pll1_clkctrl", "pll1";
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| H A D | dra74x.dtsi | 138 reg-names = "dss", "pll1_clkctrl", "pll1",
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| /freebsd/sys/contrib/device-tree/src/arm/marvell/ |
| H A D | dove-cubox.dts | 101 /* connect xtal input as source of pll0 and pll1 */
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| /freebsd/sys/contrib/device-tree/Bindings/display/ti/ |
| H A D | ti,dra7-dss.txt | 24 'pll1', 'pll2_clkctrl', 'pll2'
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| /freebsd/sys/contrib/device-tree/src/arm64/sprd/ |
| H A D | ums512.dtsi | 280 pll1: clock-controller@0 { label
856 assigned-clock-parents = <&pll1 CLK_RPLL>;
868 assigned-clock-parents = <&pll1 CLK_RPLL>;
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| /freebsd/sys/contrib/device-tree/src/arm/ti/davinci/ |
| H A D | da850.dtsi | 696 pll1: clock-controller@21a000 { label
697 compatible = "ti,da850-pll1";
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| /freebsd/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-j721e-main.dtsi | 718 wiz0_pll1_refclk: pll1-refclk {
778 wiz1_pll1_refclk: pll1-refclk {
838 wiz2_pll1_refclk: pll1-refclk {
898 wiz3_pll1_refclk: pll1-refclk {
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| H A D | k3-j7200-main.dtsi | 704 wiz0_pll1_refclk: pll1-refclk {
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| /freebsd/sys/contrib/device-tree/src/arm/renesas/ |
| H A D | sh73a0.dtsi | 651 clock-output-names = "main", "pll0", "pll1", "pll2",
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| H A D | r8a73a4.dtsi | 514 clock-output-names = "main", "pll0", "pll1", "pll2",
|