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Searched refs:phy_data (Results 1 – 20 of 20) sorted by relevance

/freebsd/sys/dev/axgbe/
H A Dxgbe-phy-v2.c436 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_redrv_write() local
461 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
475 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
558 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_put_mux() local
562 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_put_mux()
568 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_put_mux()
578 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_get_mux() local
582 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_get_mux()
586 mux_channel = 1 << phy_data->sfp_mux_channel; in xgbe_phy_sfp_get_mux()
588 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_get_mux()
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H A Dxgbe-phy-v1.c151 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_outcome() local
191 if (phy_data->speed_set == XGBE_SPEEDSET_2500_10000) in xgbe_phy_an_outcome()
300 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kr_mode() local
324 phy_data->cdr_rate[XGBE_SPEED_10000]); in xgbe_phy_kr_mode()
326 phy_data->tx_amp[XGBE_SPEED_10000]); in xgbe_phy_kr_mode()
328 phy_data->blwc[XGBE_SPEED_10000]); in xgbe_phy_kr_mode()
330 phy_data->pq_skew[XGBE_SPEED_10000]); in xgbe_phy_kr_mode()
332 phy_data->dfe_tap_cfg[XGBE_SPEED_10000]); in xgbe_phy_kr_mode()
334 phy_data->dfe_tap_ena[XGBE_SPEED_10000]); in xgbe_phy_kr_mode()
344 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_2500_mode() local
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H A Dxgbe.h1221 void *phy_data; member
/freebsd/sys/contrib/dev/iwlwifi/mld/
H A Drx.c41 struct iwl_mld_rx_phy_data *phy_data) in iwl_mld_fill_phy_data() argument
43 phy_data->phy_info = le16_to_cpu(desc->phy_info); in iwl_mld_fill_phy_data()
44 phy_data->rate_n_flags = iwl_v3_rate_from_v2_v3(desc->v3.rate_n_flags, in iwl_mld_fill_phy_data()
46 phy_data->gp2_on_air_rise = le32_to_cpu(desc->v3.gp2_on_air_rise); in iwl_mld_fill_phy_data()
47 phy_data->energy_a = desc->v3.energy_a; in iwl_mld_fill_phy_data()
48 phy_data->energy_b = desc->v3.energy_b; in iwl_mld_fill_phy_data()
49 phy_data->data0 = desc->v3.phy_data0; in iwl_mld_fill_phy_data()
50 phy_data->data1 = desc->v3.phy_data1; in iwl_mld_fill_phy_data()
51 phy_data->data2 = desc->v3.phy_data2; in iwl_mld_fill_phy_data()
52 phy_data->data3 = desc->v3.phy_data3; in iwl_mld_fill_phy_data()
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/freebsd/sys/contrib/dev/iwlwifi/mvm/
H A Drxmq.c1008 struct iwl_mvm_rx_phy_data *phy_data, in iwl_mvm_decode_he_mu_ext() argument
1011 u32 phy_data2 = le32_to_cpu(phy_data->d2); in iwl_mvm_decode_he_mu_ext()
1012 u32 phy_data3 = le32_to_cpu(phy_data->d3); in iwl_mvm_decode_he_mu_ext()
1013 u16 phy_data4 = le16_to_cpu(phy_data->d4); in iwl_mvm_decode_he_mu_ext()
1014 u32 rate_n_flags = phy_data->rate_n_flags; in iwl_mvm_decode_he_mu_ext()
1059 iwl_mvm_decode_he_phy_ru_alloc(struct iwl_mvm_rx_phy_data *phy_data, in iwl_mvm_decode_he_phy_ru_alloc() argument
1072 u8 ru = le32_get_bits(phy_data->d1, IWL_RX_PHY_DATA1_HE_RU_ALLOC_MASK); in iwl_mvm_decode_he_phy_ru_alloc()
1073 u32 rate_n_flags = phy_data->rate_n_flags; in iwl_mvm_decode_he_phy_ru_alloc()
1113 if (phy_data->d1 & cpu_to_le32(IWL_RX_PHY_DATA1_HE_RU_ALLOC_SEC80)) in iwl_mvm_decode_he_phy_ru_alloc()
1141 struct iwl_mvm_rx_phy_data *phy_data, in iwl_mvm_decode_he_phy_data() argument
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/freebsd/sys/dev/e1000/
H A De1000_phy.c1017 u16 phy_data; in e1000_set_master_slave_mode() local
1020 ret_val = hw->phy.ops.read_reg(hw, PHY_1000T_CTRL, &phy_data); in e1000_set_master_slave_mode()
1025 hw->phy.original_ms_type = (phy_data & CR_1000T_MS_ENABLE) ? in e1000_set_master_slave_mode()
1026 ((phy_data & CR_1000T_MS_VALUE) ? in e1000_set_master_slave_mode()
1032 phy_data |= (CR_1000T_MS_ENABLE | CR_1000T_MS_VALUE); in e1000_set_master_slave_mode()
1035 phy_data |= CR_1000T_MS_ENABLE; in e1000_set_master_slave_mode()
1036 phy_data &= ~(CR_1000T_MS_VALUE); in e1000_set_master_slave_mode()
1039 phy_data &= ~CR_1000T_MS_ENABLE; in e1000_set_master_slave_mode()
1045 return hw->phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data); in e1000_set_master_slave_mode()
1057 u16 phy_data; in e1000_copper_link_setup_82577() local
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H A De1000_80003es2lan.c592 u16 phy_data; in e1000_phy_force_speed_duplex_80003es2lan() local
603 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
607 phy_data &= ~GG82563_PSCR_CROSSOVER_MODE_AUTO; in e1000_phy_force_speed_duplex_80003es2lan()
608 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
612 DEBUGOUT1("GG82563 PSCR: %X\n", phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
614 ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
618 e1000_phy_force_speed_duplex_setup(hw, &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
621 phy_data |= MII_CR_RESET; in e1000_phy_force_speed_duplex_80003es2lan()
623 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
654 &phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
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H A De1000_82540.c533 u16 phy_data; in e1000_set_vco_speed_82540() local
548 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data); in e1000_set_vco_speed_82540()
552 phy_data &= ~M88E1000_PHY_VCO_REG_BIT8; in e1000_set_vco_speed_82540()
553 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data); in e1000_set_vco_speed_82540()
563 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data); in e1000_set_vco_speed_82540()
567 phy_data |= M88E1000_PHY_VCO_REG_BIT11; in e1000_set_vco_speed_82540()
568 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data); in e1000_set_vco_speed_82540()
H A De1000_82541.c675 u16 phy_data, phy_saved_data, speed, duplex, i; in e1000_config_dsp_after_link_change_82541() local
707 &phy_data); in e1000_config_dsp_after_link_change_82541()
711 phy_data &= ~IGP01E1000_PHY_EDAC_MU_INDEX; in e1000_config_dsp_after_link_change_82541()
715 phy_data); in e1000_config_dsp_after_link_change_82541()
729 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data); in e1000_config_dsp_after_link_change_82541()
736 &phy_data); in e1000_config_dsp_after_link_change_82541()
740 idle_errs += (phy_data & SR_1000T_IDLE_ERROR_CNT); in e1000_config_dsp_after_link_change_82541()
781 &phy_data); in e1000_config_dsp_after_link_change_82541()
785 phy_data &= ~IGP01E1000_PHY_EDAC_MU_INDEX; in e1000_config_dsp_after_link_change_82541()
786 phy_data |= IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS; in e1000_config_dsp_after_link_change_82541()
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H A De1000_82575.c2841 u16 phy_data; in e1000_set_eee_i354() local
2857 &phy_data); in e1000_set_eee_i354()
2861 phy_data |= E1000_M88E1543_EEE_CTRL_1_MS; in e1000_set_eee_i354()
2863 phy_data); in e1000_set_eee_i354()
2875 &phy_data); in e1000_set_eee_i354()
2880 phy_data |= E1000_EEE_ADV_100_SUPPORTED; in e1000_set_eee_i354()
2882 phy_data &= ~E1000_EEE_ADV_100_SUPPORTED; in e1000_set_eee_i354()
2885 phy_data |= E1000_EEE_ADV_1000_SUPPORTED; in e1000_set_eee_i354()
2887 phy_data &= ~E1000_EEE_ADV_1000_SUPPORTED; in e1000_set_eee_i354()
2891 phy_data); in e1000_set_eee_i354()
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H A De1000_ich8lan.c2243 u16 phy_data; in e1000_write_smbus_addr() local
2251 ret_val = e1000_read_phy_reg_hv_locked(hw, HV_SMB_ADDR, &phy_data); in e1000_write_smbus_addr()
2255 phy_data &= ~HV_SMB_ADDR_MASK; in e1000_write_smbus_addr()
2256 phy_data |= (strap >> E1000_STRAP_SMBUS_ADDRESS_SHIFT); in e1000_write_smbus_addr()
2257 phy_data |= HV_SMB_ADDR_PEC_EN | HV_SMB_ADDR_VALID; in e1000_write_smbus_addr()
2262 phy_data &= ~HV_SMB_ADDR_FREQ_MASK; in e1000_write_smbus_addr()
2263 phy_data |= (freq & (1 << 0)) << in e1000_write_smbus_addr()
2265 phy_data |= (freq & (1 << 1)) << in e1000_write_smbus_addr()
2272 return e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, phy_data); in e1000_write_smbus_addr()
2641 u16 phy_data; in e1000_hv_phy_workarounds_ich8lan() local
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H A De1000_82543.c1407 u16 phy_data; in e1000_config_mac_to_phy_82543() local
1423 ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); in e1000_config_mac_to_phy_82543()
1428 if (phy_data & M88E1000_PSSR_DPLX) in e1000_config_mac_to_phy_82543()
1437 if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) in e1000_config_mac_to_phy_82543()
1439 else if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_100MBS) in e1000_config_mac_to_phy_82543()
/freebsd/sys/cam/scsi/
H A Dscsi_enc.h232 struct ses_elm_sas_device_phy phy_data; member
239 struct ses_elm_sas_expander_phy phy_data; member
246 struct ses_elm_sas_port_phy phy_data; member
/freebsd/sys/dev/ixgbe/
H A Dixgbe_phy.h167 u16 *phy_data);
169 u16 phy_data);
171 u32 device_type, u16 *phy_data);
173 u32 device_type, u16 phy_data);
H A Dixgbe_phy.c598 u16 *phy_data) in ixgbe_read_phy_reg_mdi() argument
666 *phy_data = (u16)(data); in ixgbe_read_phy_reg_mdi()
680 u32 device_type, u16 *phy_data) in ixgbe_read_phy_reg_generic() argument
690 status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data); in ixgbe_read_phy_reg_generic()
706 u32 device_type, u16 phy_data) in ixgbe_write_phy_reg_mdi() argument
711 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); in ixgbe_write_phy_reg_mdi()
780 u32 device_type, u16 phy_data) in ixgbe_write_phy_reg_generic() argument
789 phy_data); in ixgbe_write_phy_reg_generic()
1001 u16 phy_data = 0; in ixgbe_check_phy_link_tnx() local
1019 &phy_data); in ixgbe_check_phy_link_tnx()
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H A Dixgbe_api.h72 u16 *phy_data);
74 u16 phy_data);
216 u32 device_type, u32 *phy_data);
218 u32 device_type, u32 phy_data);
H A Dixgbe_api.c576 u16 *phy_data) in ixgbe_read_phy_reg() argument
582 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); in ixgbe_read_phy_reg()
595 u16 phy_data) in ixgbe_write_phy_reg() argument
601 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); in ixgbe_write_phy_reg()
1322 u32 device_type, u32 *phy_data) in ixgbe_read_iosf_sb_reg() argument
1325 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); in ixgbe_read_iosf_sb_reg()
1338 u32 device_type, u32 phy_data) in ixgbe_write_iosf_sb_reg() argument
1341 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); in ixgbe_write_iosf_sb_reg()
H A Dixgbe_x550.h101 u32 device_type, u16 *phy_data);
103 u32 device_type, u16 phy_data);
H A Dixgbe_x550.c521 u32 device_type, u16 *phy_data) in ixgbe_read_phy_reg_x550em() argument
523 UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, *phy_data); in ixgbe_read_phy_reg_x550em()
528 u32 device_type, u16 phy_data) in ixgbe_write_phy_reg_x550em() argument
530 UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, phy_data); in ixgbe_write_phy_reg_x550em()
4319 u32 device_type, u16 *phy_data) in ixgbe_read_phy_reg_x550a() argument
4329 status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data); in ixgbe_read_phy_reg_x550a()
4347 u32 device_type, u16 phy_data) in ixgbe_write_phy_reg_x550a() argument
4356 phy_data); in ixgbe_write_phy_reg_x550a()
4518 u16 phy_data; in ixgbe_led_on_t_X550em() local
4527 IXGBE_MDIO_VENDOR_SPECIFIC_1_DEV_TYPE, &phy_data); in ixgbe_led_on_t_X550em()
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/freebsd/sys/dev/ice/
H A Dice_lib.c138 struct ice_phy_data *phy_data);
3217 struct ice_phy_data *phy_data) in ice_intersect_phy_types_and_speeds() argument
3232 switch (phy_data->report_mode) { in ice_intersect_phy_types_and_speeds()
3237 report_type = phy_data->report_mode >> 1; in ice_intersect_phy_types_and_speeds()
3242 __func__, phy_data->report_mode); in ice_intersect_phy_types_and_speeds()
3250 if (phy_data->user_speeds_orig == 0) in ice_intersect_phy_types_and_speeds()
3251 phy_data->user_speeds_orig = USHRT_MAX; in ice_intersect_phy_types_and_speeds()
3255 status = ice_aq_get_phy_caps(pi, false, phy_data->report_mode, &pcaps, NULL); in ice_intersect_phy_types_and_speeds()
3265 phy_data->phy_low_orig = le64toh(pcaps.phy_type_low); in ice_intersect_phy_types_and_speeds()
3266 phy_data->phy_high_orig = le64toh(pcaps.phy_type_high); in ice_intersect_phy_types_and_speeds()
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