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Searched refs:opcodes (Results 1 – 25 of 81) sorted by relevance

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/freebsd/contrib/llvm-project/lldb/include/lldb/Symbol/
H A DUnwindPlan.h164 void GetDWARFExpr(const uint8_t **opcodes, uint16_t &len) const { in GetDWARFExpr() argument
166 *opcodes = m_location.expr.opcodes; in GetDWARFExpr()
169 *opcodes = nullptr; in GetDWARFExpr()
174 void SetAtDWARFExpression(const uint8_t *opcodes, uint32_t len);
176 void SetIsDWARFExpression(const uint8_t *opcodes, uint32_t len);
180 return m_location.expr.opcodes; in GetDWARFExpressionBytes()
202 const uint8_t *opcodes; member
257 void SetIsDWARFExpression(const uint8_t *opcodes, uint32_t len) { in SetIsDWARFExpression() argument
259 m_value.expr.opcodes = opcodes; in SetIsDWARFExpression()
301 void GetDWARFExpr(const uint8_t **opcodes, uint16_t &len) const { in GetDWARFExpr() argument
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/freebsd/contrib/llvm-project/lldb/source/Expression/
H A DDWARFExpression.cpp595 const DataExtractor &opcodes, in Evaluate_DW_OP_entry_value() argument
731 const uint32_t subexpr_len = opcodes.GetULEB128(&opcode_offset); in Evaluate_DW_OP_entry_value()
732 const void *subexpr_data = opcodes.GetData(&opcode_offset, subexpr_len); in Evaluate_DW_OP_entry_value()
945 lldb::ModuleSP module_sp, const DataExtractor &opcodes, in Evaluate() argument
950 if (opcodes.GetByteSize() == 0) in Evaluate()
988 return Scalar(llvm::APSInt(llvm::APInt(8 * opcodes.GetAddressByteSize(), v, in Evaluate()
998 while (opcodes.ValidOffset(offset)) { in Evaluate()
1000 const uint8_t op = opcodes.GetU8(&offset); in Evaluate()
1028 stack.push_back(Scalar(opcodes.GetAddress(&offset))); in Evaluate()
1105 uint8_t size = opcodes.GetU8(&offset); in Evaluate()
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/freebsd/contrib/llvm-project/lldb/source/Symbol/
H A DUnwindPlan.cpp48 return !memcmp(m_location.expr.opcodes, rhs.m_location.expr.opcodes, in operator ==()
61 const uint8_t *opcodes, uint32_t len) { in SetAtDWARFExpression() argument
63 m_location.expr.opcodes = opcodes; in SetAtDWARFExpression()
70 const uint8_t *opcodes, uint32_t len) { in SetIsDWARFExpression() argument
72 m_location.expr.opcodes = opcodes; in SetIsDWARFExpression()
154 s, llvm::ArrayRef(m_location.expr.opcodes, m_location.expr.length), in Dump()
190 return !memcmp(m_value.expr.opcodes, rhs.m_value.expr.opcodes, in operator ==()
213 DumpDWARFExpr(s, llvm::ArrayRef(m_value.expr.opcodes, m_value.expr.length), in Dump()
365 uint32_t reg_num, const uint8_t *opcodes, uint32_t len, bool can_replace) { in SetRegisterLocationToIsDWARFExpression() argument
370 reg_loc.SetIsDWARFExpression(opcodes, len); in SetRegisterLocationToIsDWARFExpression()
/freebsd/contrib/llvm-project/lld/MachO/
H A DSyntheticSections.cpp431 std::vector<BindIR> &opcodes) { in encodeBinding() argument
435 opcodes.push_back( in encodeBinding()
442 opcodes.push_back({BIND_OPCODE_ADD_ADDR_ULEB, offset - lastBinding.offset}); in encodeBinding()
447 opcodes.push_back( in encodeBinding()
452 opcodes.push_back({BIND_OPCODE_DO_BIND, 0}); in encodeBinding()
457 static void optimizeOpcodes(std::vector<BindIR> &opcodes) { in optimizeOpcodes() argument
461 for (i = 1; i < opcodes.size(); ++i, ++pWrite) { in optimizeOpcodes()
462 if ((opcodes[i].opcode == BIND_OPCODE_ADD_ADDR_ULEB) && in optimizeOpcodes()
463 (opcodes[i - 1].opcode == BIND_OPCODE_DO_BIND)) { in optimizeOpcodes()
464 opcodes[pWrite].opcode = BIND_OPCODE_DO_BIND_ADD_ADDR_ULEB; in optimizeOpcodes()
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/freebsd/tests/sys/cam/ctl/
H A DMakefile6 ${PACKAGE}FILES+= all-supported-opcodes.txt
9 ATF_TESTS_SH+= opcodes
H A Dopcodes.sh55 atf_check -o file:$(atf_get_srcdir)/all-supported-opcodes.txt sg_opcodes -p disk -nH /dev/$dev
/freebsd/sys/dev/bhnd/nvram/
H A Dbhnd_nvram_data_sprom_subr.c300 size_t opcodes; in bhnd_sprom_opcode_init_entry() local
323 opcodes = (state->input - state->layout->bindings); in bhnd_sprom_opcode_init_entry()
324 if (opcodes > UINT16_MAX) { in bhnd_sprom_opcode_init_entry()
326 "%zu\n", opcodes); in bhnd_sprom_opcode_init_entry()
329 entry->opcodes = opcodes; in bhnd_sprom_opcode_init_entry()
346 BHND_NV_ASSERT(entry->opcodes < state->layout->bindings_size, in bhnd_sprom_opcode_seek()
354 state->input = state->layout->bindings + entry->opcodes; in bhnd_sprom_opcode_seek()
H A Dbhnd_nvram_data_spromvar.h150 uint16_t opcodes; /**< SPROM opcode offset */ member
/freebsd/contrib/llvm-project/lldb/include/lldb/Expression/
H A DDWARFExpression.h56 const DataExtractor &opcodes,
153 lldb::ModuleSP module_sp, const DataExtractor &opcodes,
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetInstrPredicate.td84 // set of opcodes.
199 // Check that the instruction opcode is one of the opcodes in set `Opcodes`.
253 // `opcodes` list, and each case is associated with MCStatement `caseStmt`.
254 class MCOpcodeSwitchCase<list<Instruction> opcodes, MCStatement caseStmt> {
255 list<Instruction> Opcodes = opcodes;
322 // a) MI's opcode is in the `opcodes` set, and
334 class InstructionEquivalenceClass<list<Instruction> opcodes,
337 list<Instruction> Opcodes = opcodes;
348 class DepBreakingClass<list<Instruction> opcodes, MCInstPredicate pred,
350 : InstructionEquivalenceClass<opcodes, pre
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/freebsd/contrib/llvm-project/lldb/source/Plugins/SymbolFile/DWARF/
H A DSymbolFileDWARFDwo.cpp100 uint8_t op, const lldb_private::DataExtractor &opcodes, in ParseVendorDWARFOpcode() argument
102 return GetBaseSymbolFile().ParseVendorDWARFOpcode(op, opcodes, offset, stack); in ParseVendorDWARFOpcode()
H A DSymbolFileDWARFDwo.h52 bool ParseVendorDWARFOpcode(uint8_t op, const DataExtractor &opcodes,
/freebsd/sys/contrib/libsodium/
H A Dconfigure.ac438 # error NativeClient detected - Avoiding AVX opcodes
454 # error NativeClient detected - Avoiding AVX2 opcodes
469 # error NativeClient detected - Avoiding AVX2 opcodes
487 # error NativeClient detected - Avoiding AVX512F opcodes
507 # error NativeClient detected - Avoiding AESNI opcodes
527 # error NativeClient detected - Avoiding RDRAND opcodes
632 AC_MSG_CHECKING(whether we can assemble AVX opcodes)
646 AC_DEFINE([HAVE_AVX_ASM], [1], [AVX opcodes are supported])
/freebsd/contrib/llvm-project/clang/include/clang/Analysis/Analyses/
H A DThreadSafetyOps.def9 // This file defines the list of core opcodes for the Thread Safety
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrGISel.td1 //===- X86InstrGISel.td - X86 GISel target specific opcodes -*- tablegen -*===//
H A DX86SchedPredicates.td17 // the expected instruction opcodes, because different processors may implement
/freebsd/sys/netpfil/ipfw/nat64/
H A Dnat64stl_control.c508 NAT64_DEFINE_OPCODE_REWRITER(nat64stl, NAT64STL, opcodes);
533 IPFW_ADD_OBJ_REWRITER(first, opcodes); in nat64stl_init()
541 IPFW_DEL_OBJ_REWRITER(last, opcodes); in nat64stl_uninit()
H A Dnat64clat_control.c503 NAT64_DEFINE_OPCODE_REWRITER(nat64clat, NAT64CLAT, opcodes);
528 IPFW_ADD_OBJ_REWRITER(first, opcodes); in nat64clat_init()
536 IPFW_DEL_OBJ_REWRITER(last, opcodes); in nat64clat_uninit()
H A Dnat64lsn_control.c899 NAT64_DEFINE_OPCODE_REWRITER(nat64lsn, NAT64LSN, opcodes);
926 IPFW_ADD_OBJ_REWRITER(first, opcodes); in nat64lsn_init()
934 IPFW_DEL_OBJ_REWRITER(last, opcodes); in nat64lsn_uninit()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiSchedule.td34 // Allow scheduler to assign default model to any unrecognized opcodes.
/freebsd/crypto/openssl/test/radix/
H A DREADME.md40 - Due to usage of the new QUIC server API, opcodes are no longer duplicated
72 - The number of core opcodes for the interpreter has been dramatically reduced
/freebsd/contrib/llvm-project/clang/lib/AST/ByteCode/
H A DOpcodes.td9 // Helper file used to generate opcodes, the interpreter and the disassembler.
135 // Record describing all opcodes.
164 // Jump opcodes
737 // Comparison opcodes.
/freebsd/sys/netpfil/ipfw/nptv6/
H A Dnptv6.c977 static struct opcode_obj_rewrite opcodes[] = { variable
1015 IPFW_ADD_OBJ_REWRITER(first, opcodes); in nptv6_init()
1025 IPFW_DEL_OBJ_REWRITER(last, opcodes); in nptv6_uninit()
/freebsd/contrib/llvm-project/lldb/docs/design/
H A Doverview.rst
/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DTargetOpcodes.def9 // This file defines the target independent instruction opcodes.
241 /// The following generic opcodes are not supposed to appear after ISel.
436 // Marker for start of Generic AtomicRMW opcodes
439 // Marker for end of Generic AtomicRMW opcodes
951 /// generic opcodes.

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