Searched refs:num_banks (Results 1 – 18 of 18) sorted by relevance
45 msix_num_entries += hw_data->num_banks; in adf_enable_msix()49 num_vectors = hw_data->num_banks + 1; in adf_enable_msix()53 vectors[hw_data->num_banks] = 1; in adf_enable_msix()175 for (i = 0; i < hw_data->num_banks; i++) { in adf_request_irqs()225 rid = hw_data->num_banks + 1; in adf_request_irqs()291 msix_num_entries += hw_data->num_banks; in adf_isr_alloc_msix_entry_table()
668 u32 num_banks = 0; in adf_init_etr_data() local675 num_banks = GET_MAX_BANKS(accel_dev); in adf_init_etr_data()676 size = num_banks * sizeof(struct adf_etr_bank_data); in adf_init_etr_data()701 for (i = 0; i < num_banks; i++) { in adf_init_etr_data()748 u32 i, num_banks = GET_MAX_BANKS(accel_dev); in adf_cleanup_etr_handles() local750 for (i = 0; i < num_banks; i++) in adf_cleanup_etr_handles()
196 if (bank_number >= hw_data->num_banks) in adf_gen4_ring_pair_reset()
150 dev_info->banks_per_accel = hw_data->num_banks in adf_ctl_ioctl_get_status()
960 for (index = 0; index < hw_device->num_banks; index++) { in adf_cfg_create_accel_section()1129 for (index = 0; index < accel_dev->hw_device->num_banks; index++) { in adf_cfg_setup_irq()
584 sizeof(struct adf_cfg_bundle *) * accel_dev->hw_device->num_banks, in adf_cfg_device_init()588 device->bundle_num = accel_dev->hw_device->num_banks; in adf_cfg_device_init()
135 for (i = 0; i < hw_data->num_banks; i++) in adf_init_arb_c4xxx()179 for (i = 0; i < hw_data->num_banks; i++) in adf_exit_arb_c4xxx()
2124 hw_data->num_banks = ADF_C4XXX_ETR_MAX_BANKS; in adf_init_hw_data_c4xxx()
301 if (bank_number >= accel_dev->hw_device->num_banks) in adf_4xxxvf_ring_pair_reset()340 hw_data->num_banks = ADF_4XXXIOV_ETR_MAX_BANKS; in adf_init_hw_data_4xxxiov()
1650 int bank, error, num_banks; in qat_crypto_init() local1655 num_banks = imin(mp_ncpus, sc->sc_hw.qhw_num_banks); in qat_crypto_init()1657 num_banks = sc->sc_ae_num; in qat_crypto_init()1659 qcy->qcy_num_banks = num_banks; in qat_crypto_init()1662 qat_alloc_mem(sizeof(struct qat_crypto_bank) * num_banks); in qat_crypto_init()1664 for (bank = 0; bank < num_banks; bank++) { in qat_crypto_init()
444 uint8_t num_banks; member507 #define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks)
328 hw_data->num_banks = ADF_DH895XCC_ETR_MAX_BANKS; in adf_init_hw_data_dh895xcc()
335 hw_data->num_banks = ADF_C3XXX_ETR_MAX_BANKS; in adf_init_hw_data_c3xxx()
340 hw_data->num_banks = ADF_C62X_ETR_MAX_BANKS; in adf_init_hw_data_c62x()
460 hw_data->num_banks = ADF_200XX_ETR_MAX_BANKS; in adf_init_hw_data_200xx()
1517 u8 num_banks; member1526 u8 num_banks; member
711 cfg->num_banks = 1; in ath10k_htt_send_frag_desc_bank_cfg_32()773 cfg->num_banks = 1; in ath10k_htt_send_frag_desc_bank_cfg_64()
938 hw_data->num_banks = ADF_4XXX_ETR_MAX_BANKS; in adf_init_hw_data_4xxx()