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Searched refs:msix (Results 1 – 25 of 54) sorted by relevance

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/freebsd/sys/amd64/vmm/io/
H A Dppt.c115 } msix; member
318 rid = ppt->msix.startrid + idx; in ppt_teardown_msix_intr()
319 res = ppt->msix.res[idx]; in ppt_teardown_msix_intr()
320 cookie = ppt->msix.cookie[idx]; in ppt_teardown_msix_intr()
328 ppt->msix.res[idx] = NULL; in ppt_teardown_msix_intr()
329 ppt->msix.cookie[idx] = NULL; in ppt_teardown_msix_intr()
337 if (ppt->msix.num_msgs == 0) in ppt_teardown_msix()
340 for (i = 0; i < ppt->msix.num_msgs; i++) in ppt_teardown_msix()
343 free(ppt->msix.res, M_PPTMSIX); in ppt_teardown_msix()
344 free(ppt->msix.cookie, M_PPTMSIX); in ppt_teardown_msix()
[all …]
/freebsd/sys/dev/pci/
H A Dpci.c984 cfg->msix.msix_location = ptr; in pci_read_cap()
985 cfg->msix.msix_ctrl = REG(ptr + PCIR_MSIX_CTRL, 2); in pci_read_cap()
987 cfg->msix.msix_table_bar = PCIR_BAR(val & in pci_read_cap()
989 cfg->msix.msix_table_offset = val & ~PCIM_MSIX_BIR_MASK; in pci_read_cap()
991 cfg->msix.msix_pba_bar = PCIR_BAR(val & in pci_read_cap()
993 cfg->msix.msix_pba_offset = val & ~PCIM_MSIX_BIR_MASK; in pci_read_cap()
1715 struct pcicfg_msix *msix = &dinfo->cfg.msix; in pci_write_msix_entry() local
1718 KASSERT(msix->msix_table_len > index, ("bogus index")); in pci_write_msix_entry()
1719 offset = msix->msix_table_offset + index * 16; in pci_write_msix_entry()
1720 bus_write_4(msix->msix_table_res, offset, address & 0xffffffff); in pci_write_msix_entry()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dal,alpine-msix.txt7 - compatible: should be "al,alpine-msix"
17 msix: msix {
18 compatible = "al,alpine-msix";
/freebsd/sys/contrib/device-tree/src/arm/amazon/
H A Dalpine.dtsi164 msi-parent = <&msix>;
167 msix: msix@fbe00000 { label
168 compatible = "al,alpine-msix";
/freebsd/sys/contrib/device-tree/src/arm64/al/
H A Dalpine-v2.dtsi142 msi-parent = <&msix>;
145 msix: msix@fbe00000 { label
146 compatible = "al,alpine-msix";
/freebsd/sys/contrib/device-tree/src/arm64/amazon/
H A Dalpine-v2.dtsi144 msi-parent = <&msix>;
147 msix: msix@fbe00000 { label
148 compatible = "al,alpine-msix";
H A Dalpine-v3.dtsi353 msi-parent = <&msix>;
356 msix: msix@fbe00000 { label
357 compatible = "al,alpine-msix";
/freebsd/sys/dev/igc/
H A Dif_igc.h322 u32 msix; member
331 u32 msix; member
369 int msix; member
H A Dif_igc.c1079 if (tx_que->msix != que->msix) in igc_neweitr()
1112 IGC_WRITE_REG(hw, IGC_EITR(que->msix), que->eitr_setting); in igc_neweitr()
1867 igc_if_msix_intr_assign(if_ctx_t ctx, int msix) in igc_if_msix_intr_assign() argument
1889 rx_que->msix = vector; in igc_if_msix_intr_assign()
1909 tx_que->msix = (vector % sc->rx_num_queues); in igc_if_msix_intr_assign()
1961 ivar |= (rx_que->msix | IGC_IVAR_VALID) << 16; in igc_configure_queues()
1964 ivar |= rx_que->msix | IGC_IVAR_VALID; in igc_configure_queues()
1975 ivar |= (tx_que->msix | IGC_IVAR_VALID) << 24; in igc_configure_queues()
1978 ivar |= (tx_que->msix | IGC_IVAR_VALID) << 8; in igc_configure_queues()
2005 IGC_WRITE_REG(hw, IGC_EITR(rx_que->msix), in igc_initialize_interrupt_rate()
[all …]
/freebsd/sys/dev/aq/
H A Daq_main.c193 static int aq_if_msix_intr_assign(if_ctx_t ctx, int msix);
769 err = aq_hw_init(&softc->hw, softc->hw.mac_addr, softc->msix, in aq_if_init()
1065 itr_irq_msk_setlsw_set(hw, BIT(softc->msix + 1) - 1); in aq_if_enable_intr()
1079 itr_irq_msk_clearlsw_set(hw, BIT(softc->msix + 1) - 1); in aq_if_disable_intr()
1092 itr_irq_msk_setlsw_set(hw, BIT(softc->rx_rings[rxqid]->msix)); in aq_if_rx_queue_intr_enable()
1106 itr_irq_msk_setlsw_set(hw, BIT(softc->tx_rings[txqid]->msix)); in aq_if_tx_queue_intr_enable()
1113 aq_if_msix_intr_assign(if_ctx_t ctx, int msix) in aq_if_msix_intr_assign() argument
1137 softc->rx_rings[i]->msix = vector; in aq_if_msix_intr_assign()
1144 softc->tx_rings[i]->msix = (i % softc->rx_rings_count); in aq_if_msix_intr_assign()
1146 &softc->rx_rings[softc->tx_rings[i]->msix]->irq, in aq_if_msix_intr_assign()
[all …]
H A Daq_irq.c438 itr_irq_status_clearlsw_set(hw, BIT(ring->msix)); in aq_isr_rx()
453 itr_irq_status_clearlsw_set(hw, BIT(aq_dev->msix)); in aq_linkstat_isr()
H A Daq_device.h111 int msix; member
H A Daq_ring.h151 int msix; member
/freebsd/sys/dts/arm/
H A Dannapurna-alpine.dts178 msix: msix { label
179 compatible = "annapurna-labs,al-msix";
199 msi-parent = <&msix>;
/freebsd/sys/dev/ixgbe/
H A Dixgbe.h338 u32 msix; /* This queue's MSIX vector */ member
350 u32 msix; /* This queue's MSIX vector */ member
413 int msix; member
H A Dif_fdir.c139 input, common, que->msix); in ixgbe_atr()
H A Dif_ixv.c1027 ixv_disable_queue(sc, que->msix); in ixv_msix_que()
1591 ixv_if_msix_intr_assign(if_ctx_t ctx, int msix) in ixv_if_msix_intr_assign() argument
1616 rx_que->msix = vector; in ixv_if_msix_intr_assign()
1622 tx_que->msix = i % sc->num_rx_queues; in ixv_if_msix_intr_assign()
1624 &sc->rx_queues[tx_que->msix].que_irq, in ixv_if_msix_intr_assign()
2339 ixv_enable_queue(sc, que->msix); in ixv_if_enable_intr()
2412 ixv_set_ivar(sc, i, que->msix, 0); in ixv_configure_ivars()
2414 ixv_set_ivar(sc, i, que->msix, 1); in ixv_configure_ivars()
2416 IXGBE_WRITE_REG(&sc->hw, IXGBE_VTEITR(que->msix), in ixv_configure_ivars()
/freebsd/sys/dev/iavf/
H A Diavf_iflib.h204 u32 msix; member
223 u32 msix; member
H A Dif_iavf_iflib.c70 static int iavf_if_msix_intr_assign(if_ctx_t ctx, int msix);
1135 iavf_if_msix_intr_assign(if_ctx_t ctx, int msix __unused) in iavf_if_msix_intr_assign()
1171 rx_que->msix = vector; in iavf_if_msix_intr_assign()
1182 tx_que->msix = (i % vsi->shared->isc_nrxqsets) + 1; in iavf_if_msix_intr_assign()
1241 iavf_enable_queue_irq(hw, rx_que->msix - 1); in iavf_if_rx_queue_intr_enable()
1262 iavf_enable_queue_irq(hw, tx_que->msix - 1); in iavf_if_tx_queue_intr_enable()
2416 sbuf_printf(buf, "(rxq %3d): %d\n", i, rx_que->msix); in iavf_sysctl_queue_interrupt_table()
2420 sbuf_printf(buf, "(txq %3d): %d\n", i, tx_que->msix); in iavf_sysctl_queue_interrupt_table()
/freebsd/sys/dev/e1000/
H A Dif_em.h530 u32 msix; member
539 u32 msix; member
583 int msix; member
/freebsd/sys/dev/oce/
H A Doce_user.h75 } msix; member
/freebsd/sys/dev/ixl/
H A Dixl.h385 u32 msix; member
395 u32 msix; /* This queue's MSIX vector */ member
H A Dixl_iw.c41 #define IXL_IW_VEC_BASE(pf) ((pf)->msix - (pf)->iw_msix)
43 #define IXL_IW_VEC_LIMIT(pf) ((pf)->msix)
/freebsd/sys/dev/ice/
H A Dice_rdma.h228 * @var ice_rdma_peer::msix
229 * info about msix vectors
248 struct ice_rdma_msix msix; member
/freebsd/sys/dev/tws/
H A Dtws.h237 struct tws_msix_info msix; /* msix info */ member

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