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Searched refs:mdev (Results 1 – 25 of 156) sorted by relevance

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/freebsd/sys/dev/mthca/
H A Dmthca_main.c137 static int mthca_tune_pci(struct mthca_dev *mdev) in mthca_tune_pci() argument
143 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) { in mthca_tune_pci()
144 if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) { in mthca_tune_pci()
145 mthca_err(mdev, "Couldn't set PCI-X max read count, " in mthca_tune_pci()
149 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) in mthca_tune_pci()
150 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); in mthca_tune_pci()
152 if (pci_is_pcie(mdev->pdev)) { in mthca_tune_pci()
153 if (pcie_set_readrq(mdev->pdev, 4096)) { in mthca_tune_pci()
154 mthca_err(mdev, "Couldn't write PCI Express read request, " in mthca_tune_pci()
158 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) in mthca_tune_pci()
[all …]
H A Dmthca_reset.c41 int mthca_reset(struct mthca_dev *mdev) in mthca_reset() argument
73 if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) { in mthca_reset()
77 while ((bridge = pci_get_device(mdev->pdev->vendor, in mthca_reset()
78 mdev->pdev->device + 2, in mthca_reset()
81 bridge->subordinate == mdev->pdev->bus) { in mthca_reset()
82 mthca_dbg(mdev, "Found bridge: %s\n", in mthca_reset()
94 mthca_warn(mdev, "No bridge found for %s\n", in mthca_reset()
95 pci_name(mdev->pdev)); in mthca_reset()
98 mthca_warn(mdev, "Reset on PCI-X is not supported.\n"); in mthca_reset()
108 mthca_err(mdev, "Couldn't allocate memory to save HCA " in mthca_reset()
[all …]
/freebsd/sys/dev/mlx4/mlx4_en/
H A Dmlx4_en_main.c75 static int mlx4_en_get_profile(struct mlx4_en_dev *mdev) in mlx4_en_get_profile() argument
77 struct mlx4_en_profile *params = &mdev->profile; in mlx4_en_get_profile()
83 if (params->udp_rss && !(mdev->dev->caps.flags in mlx4_en_get_profile()
85 mlx4_warn(mdev, "UDP RSS is not supported on this device.\n"); in mlx4_en_get_profile()
114 struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr; in mlx4_en_event() local
120 if (!mdev->pndev[port]) in mlx4_en_event()
122 priv = mlx4_netdev_priv(mdev->pndev[port]); in mlx4_en_event()
126 queue_work(mdev->workqueue, &priv->linkstate_task); in mlx4_en_event()
130 mlx4_err(mdev, "Internal error detected, restarting device\n"); in mlx4_en_event()
138 !mdev->pndev[port]) in mlx4_en_event()
[all …]
H A Dmlx4_en_cq.c57 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_create_cq() local
71 cq->buf_size = cq->size * mdev->dev->caps.cqe_size; in mlx4_en_create_cq()
88 cq->vector = mdev->dev->caps.num_comp_vectors; in mlx4_en_create_cq()
91 err = mlx4_alloc_hwq_res(mdev->dev, &cq->wqres, in mlx4_en_create_cq()
106 mlx4_free_hwq_res(mdev->dev, &cq->wqres, cq->buf_size); in mlx4_en_create_cq()
116 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_activate_cq() local
121 cq->dev = mdev->pndev[priv->port]; in mlx4_en_activate_cq()
129 if (!mlx4_is_eq_vector_valid(mdev->dev, priv->port, in mlx4_en_activate_cq()
131 cq->vector = cq_idx % mdev->dev->caps.num_comp_vectors; in mlx4_en_activate_cq()
133 err = mlx4_assign_eq(mdev->dev, priv->port, in mlx4_en_activate_cq()
[all …]
H A Dmlx4_en_netdev.c188 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); in mlx4_en_filter_work()
193 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); in mlx4_en_filter_work()
259 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); in mlx4_en_filter_free()
341 queue_work(priv->mdev->workqueue, &filter->work); in mlx4_en_filter_rfs()
406 struct mlx4_en_dev *mdev = priv->mdev; in mlx4_en_vlan_rx_add_vid() local
418 mutex_lock(&mdev->state_lock); in mlx4_en_vlan_rx_add_vid()
419 if (mdev->device_up && priv->port_up) { in mlx4_en_vlan_rx_add_vid()
420 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); in mlx4_en_vlan_rx_add_vid()
424 if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx)) in mlx4_en_vlan_rx_add_vid()
426 mutex_unlock(&mdev->state_lock); in mlx4_en_vlan_rx_add_vid()
[all …]
/freebsd/sys/dev/mlx5/mlx5_core/
H A Dmlx5_fwdump.c54 mlx5_fwdump_destroy_dd(struct mlx5_core_dev *mdev) in mlx5_fwdump_destroy_dd() argument
57 mtx_assert(&mdev->dump_lock, MA_OWNED); in mlx5_fwdump_destroy_dd()
58 free(mdev->dump_data, M_MLX5_DUMP); in mlx5_fwdump_destroy_dd()
59 mdev->dump_data = NULL; in mlx5_fwdump_destroy_dd()
68 mlx5_fwdump_prep(struct mlx5_core_dev *mdev) in mlx5_fwdump_prep() argument
75 mdev->dump_data = NULL; in mlx5_fwdump_prep()
79 mlx5_core_warn(mdev, in mlx5_fwdump_prep()
86 error = mlx5_vsc_find_cap(mdev); in mlx5_fwdump_prep()
89 mlx5_core_warn(mdev, in mlx5_fwdump_prep()
94 error = mlx5_vsc_lock(mdev); in mlx5_fwdump_prep()
[all …]
H A Dmlx5_vsc.c33 int mlx5_vsc_lock(struct mlx5_core_dev *mdev) in mlx5_vsc_lock() argument
35 device_t dev = mdev->pdev->dev.bsddev; in mlx5_vsc_lock()
36 int vsc_addr = mdev->vsc_addr; in mlx5_vsc_lock()
42 mlx5_core_warn(mdev, "Unable to acquire vsc lock, vsc_addr not initialized\n"); in mlx5_vsc_lock()
73 void mlx5_vsc_unlock(struct mlx5_core_dev *mdev) in mlx5_vsc_unlock() argument
75 device_t dev = mdev->pdev->dev.bsddev; in mlx5_vsc_unlock()
76 int vsc_addr = mdev->vsc_addr; in mlx5_vsc_unlock()
79 mlx5_core_warn(mdev, "Unable to release vsc lock, vsc_addr not initialized\n"); in mlx5_vsc_unlock()
87 mlx5_vsc_wait_on_flag(struct mlx5_core_dev *mdev, u32 expected) in mlx5_vsc_wait_on_flag() argument
89 device_t dev = mdev->pdev->dev.bsddev; in mlx5_vsc_wait_on_flag()
[all …]
H A Dmlx5_wq.c63 int mlx5_wq_cyc_create(struct mlx5_core_dev *mdev, struct mlx5_wq_param *param, in mlx5_wq_cyc_create() argument
73 err = mlx5_db_alloc(mdev, &wq_ctrl->db); in mlx5_wq_cyc_create()
75 mlx5_core_warn(mdev, "mlx5_db_alloc() failed, %d\n", err); in mlx5_wq_cyc_create()
79 err = mlx5_buf_alloc(mdev, mlx5_wq_cyc_get_byte_size(wq), in mlx5_wq_cyc_create()
82 mlx5_core_warn(mdev, "mlx5_buf_alloc() failed, %d\n", err); in mlx5_wq_cyc_create()
89 wq_ctrl->mdev = mdev; in mlx5_wq_cyc_create()
94 mlx5_db_free(mdev, &wq_ctrl->db); in mlx5_wq_cyc_create()
99 int mlx5_cqwq_create(struct mlx5_core_dev *mdev, struct mlx5_wq_param *param, in mlx5_cqwq_create() argument
110 err = mlx5_db_alloc(mdev, &wq_ctrl->db); in mlx5_cqwq_create()
112 mlx5_core_warn(mdev, "mlx5_db_alloc() failed, %d\n", err); in mlx5_cqwq_create()
[all …]
H A Dmlx5_uar.c60 static int uars_per_sys_page(struct mlx5_core_dev *mdev) in uars_per_sys_page() argument
62 if (MLX5_CAP_GEN(mdev, uar_4k)) in uars_per_sys_page()
63 return MLX5_CAP_GEN(mdev, num_of_uars_per_page); in uars_per_sys_page()
68 static u64 uar2pfn(struct mlx5_core_dev *mdev, u32 index) in uar2pfn() argument
72 if (MLX5_CAP_GEN(mdev, uar_4k)) in uar2pfn()
77 return (pci_resource_start(mdev->pdev, 0) >> PAGE_SHIFT) + system_page_index; in uar2pfn()
86 if (mlx5_cmd_free_uar(up->mdev, up->index)) in up_rel_func()
87 mlx5_core_warn(up->mdev, "failed to free uar index %d\n", up->index); in up_rel_func()
93 static struct mlx5_uars_page *alloc_uars_page(struct mlx5_core_dev *mdev, in alloc_uars_page() argument
102 bfregs = uars_per_sys_page(mdev) * MLX5_BFREGS_PER_UAR; in alloc_uars_page()
[all …]
H A Dmlx5_vport.c34 static int mlx5_modify_nic_vport_context(struct mlx5_core_dev *mdev, void *in,
37 static int _mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, in _mlx5_query_vport_state() argument
50 err = mlx5_cmd_exec(mdev, in, sizeof(in), out, outlen); in _mlx5_query_vport_state()
52 mlx5_core_warn(mdev, "MLX5_CMD_OP_QUERY_VPORT_STATE failed\n"); in _mlx5_query_vport_state()
57 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport) in mlx5_query_vport_state() argument
61 _mlx5_query_vport_state(mdev, opmod, vport, out, sizeof(out)); in mlx5_query_vport_state()
67 u8 mlx5_query_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport) in mlx5_query_vport_admin_state() argument
71 _mlx5_query_vport_state(mdev, opmod, vport, out, sizeof(out)); in mlx5_query_vport_admin_state()
77 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod, in mlx5_modify_vport_admin_state() argument
94 err = mlx5_cmd_exec(mdev, in, sizeof(in), out, sizeof(out)); in mlx5_modify_vport_admin_state()
[all …]
/freebsd/sys/dev/mlx5/
H A Ddevice.h1050 #define MLX5_CAP_GEN(mdev, cap) \ argument
1051 MLX5_GET(cmd_hca_cap, mdev->hca_caps_cur[MLX5_CAP_GENERAL], cap)
1053 #define MLX5_CAP_GEN_64(mdev, cap) \ argument
1054 MLX5_GET64(cmd_hca_cap, mdev->hca_caps_cur[MLX5_CAP_GENERAL], cap)
1056 #define MLX5_CAP_GEN_MAX(mdev, cap) \ argument
1057 MLX5_GET(cmd_hca_cap, mdev->hca_caps_max[MLX5_CAP_GENERAL], cap)
1059 #define MLX5_CAP_GEN_2(mdev, cap) \ argument
1060 MLX5_GET(cmd_hca_cap_2, mdev->hca_caps_cur[MLX5_CAP_GENERAL_2], cap)
1062 #define MLX5_CAP_ETH(mdev, cap) \ argument
1064 mdev->hca_caps_cur[MLX5_CAP_ETHERNET_OFFLOADS], cap)
[all …]
H A Dvport.h37 int mlx5_vport_alloc_q_counter(struct mlx5_core_dev *mdev, int client_id,
39 int mlx5_vport_dealloc_q_counter(struct mlx5_core_dev *mdev, int client_id,
41 int mlx5_vport_query_q_counter(struct mlx5_core_dev *mdev,
46 int mlx5_vport_query_out_of_rx_buffer(struct mlx5_core_dev *mdev,
54 int mlx5_nic_vport_query_local_lb(struct mlx5_core_dev *mdev,
57 int mlx5_nic_vport_update_local_lb(struct mlx5_core_dev *mdev, bool enable);
58 int mlx5_nic_vport_modify_local_lb(struct mlx5_core_dev *mdev,
61 u8 mlx5_query_vport_state(struct mlx5_core_dev *mdev, u8 opmod, u16 vport);
62 u8 mlx5_query_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod,
64 int mlx5_modify_vport_admin_state(struct mlx5_core_dev *mdev, u8 opmod,
[all …]
H A Dport.h202 int mlx5_max_tc(struct mlx5_core_dev *mdev);
203 int mlx5_query_port_tc_rate_limit(struct mlx5_core_dev *mdev,
206 int mlx5_modify_port_tc_rate_limit(struct mlx5_core_dev *mdev,
209 int mlx5_query_port_prio_tc(struct mlx5_core_dev *mdev,
211 int mlx5_set_port_prio_tc(struct mlx5_core_dev *mdev, int prio_index,
213 int mlx5_set_port_tc_group(struct mlx5_core_dev *mdev, const u8 *tc_group);
214 int mlx5_query_port_tc_group(struct mlx5_core_dev *mdev,
216 int mlx5_set_port_tc_bw_alloc(struct mlx5_core_dev *mdev, const u8 *tc_bw);
217 int mlx5_query_port_tc_bw_alloc(struct mlx5_core_dev *mdev, u8 *bw_pct);
219 int mlx5_set_trust_state(struct mlx5_core_dev *mdev, u8 trust_state);
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt7921/
H A Dsdio.c29 struct mt76_dev *mdev = container_of(sdio, struct mt76_dev, sdio); in mt7921s_txrx_worker() local
30 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); in mt7921s_txrx_worker()
33 queue_work(mdev->wq, &dev->pm.wake_work); in mt7921s_txrx_worker()
126 struct mt76_dev *mdev; in mt7921s_probe() local
135 mdev = mt76_alloc_device(&func->dev, sizeof(*dev), ops, &drv_ops); in mt7921s_probe()
136 if (!mdev) in mt7921s_probe()
139 dev = container_of(mdev, struct mt792x_dev, mt76); in mt7921s_probe()
144 ret = mt76s_init(mdev, func, &mt7921s_ops); in mt7921s_probe()
148 ret = mt76s_hw_init(mdev, func, MT76_CONNAC2_SDIO); in mt7921s_probe()
152 mdev->rev = (mt76_rr(dev, MT_HW_CHIPID) << 16) | in mt7921s_probe()
[all …]
H A Dpci.c139 static u32 mt7921_rr(struct mt76_dev *mdev, u32 offset) in mt7921_rr() argument
141 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); in mt7921_rr()
144 return dev->bus_ops->rr(mdev, addr); in mt7921_rr()
147 static void mt7921_wr(struct mt76_dev *mdev, u32 offset, u32 val) in mt7921_wr() argument
149 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); in mt7921_wr()
152 dev->bus_ops->wr(mdev, addr, val); in mt7921_wr()
155 static u32 mt7921_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val) in mt7921_rmw() argument
157 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); in mt7921_rmw()
160 return dev->bus_ops->rmw(mdev, addr, mask, val); in mt7921_rmw()
272 struct mt76_dev *mdev; in mt7921_pci_probe() local
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt76x2/
H A Dpci.c37 struct mt76_dev *mdev; in mt76x2e_probe() local
54 mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt76x2_ops, in mt76x2e_probe()
56 if (!mdev) in mt76x2e_probe()
59 dev = container_of(mdev, struct mt76x02_dev, mt76); in mt76x2e_probe()
60 mt76_mmio_init(mdev, pcim_iomap_table(pdev)[0]); in mt76x2e_probe()
63 mdev->rev = mt76_rr(dev, MT_ASIC_VERSION); in mt76x2e_probe()
64 dev_info(mdev->dev, "ASIC revision: %08x\n", mdev->rev); in mt76x2e_probe()
68 ret = devm_request_irq(mdev->dev, pdev->irq, mt76x02_irq_handler, in mt76x2e_probe()
101 struct mt76_dev *mdev = pci_get_drvdata(pdev); in mt76x2e_remove() local
102 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76); in mt76x2e_remove()
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt7615/
H A Dsdio.c31 struct mt76_dev *mdev = container_of(sdio, struct mt76_dev, sdio); in mt7663s_txrx_worker() local
32 struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); in mt7663s_txrx_worker()
35 queue_work(mdev->wq, &dev->pm.wake_work); in mt7663s_txrx_worker()
103 struct mt76_dev *mdev; in mt7663s_probe() local
111 mdev = mt76_alloc_device(&func->dev, sizeof(*dev), ops, &drv_ops); in mt7663s_probe()
112 if (!mdev) in mt7663s_probe()
115 dev = container_of(mdev, struct mt7615_dev, mt76); in mt7663s_probe()
122 ret = mt76s_init(mdev, func, &mt7663s_ops); in mt7663s_probe()
126 ret = mt76s_hw_init(mdev, func, MT76_CONNAC_SDIO); in mt7663s_probe()
130 mdev->rev = (mt76_rr(dev, MT_HW_CHIPID) << 16) | in mt7663s_probe()
[all …]
H A Dpci.c63 struct mt76_dev *mdev = pci_get_drvdata(pdev); in mt7615_pci_remove() local
64 struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); in mt7615_pci_remove()
74 struct mt76_dev *mdev = pci_get_drvdata(pdev); in mt7615_pci_suspend() local
75 struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); in mt7615_pci_suspend()
86 err = mt76_connac_mcu_set_hif_suspend(mdev, true); in mt7615_pci_suspend()
91 napi_disable(&mdev->tx_napi); in mt7615_pci_suspend()
92 mt76_worker_disable(&mdev->tx_worker); in mt7615_pci_suspend()
94 mt76_for_each_q_rx(mdev, i) { in mt7615_pci_suspend()
95 napi_disable(&mdev->napi[i]); in mt7615_pci_suspend()
97 tasklet_kill(&mdev->irq_tasklet); in mt7615_pci_suspend()
[all …]
/freebsd/sys/dev/mlx5/mlx5_fpga/
H A Dmlx5fpga_core.c153 err = mlx5_fpga_query(fdev->mdev, &query); in mlx5_fpga_device_load_check()
167 fpga_id = MLX5_CAP_FPGA(fdev->mdev, fpga_id); in mlx5_fpga_device_load_check()
184 struct mlx5_core_dev *mdev = fdev->mdev; in mlx5_fpga_device_brb() local
186 err = mlx5_fpga_ctrl_op(mdev, MLX5_FPGA_CTRL_OPERATION_SANDBOX_BYPASS_ON); in mlx5_fpga_device_brb()
191 err = mlx5_fpga_ctrl_op(mdev, MLX5_FPGA_CTRL_OPERATION_RESET_SANDBOX); in mlx5_fpga_device_brb()
196 err = mlx5_fpga_ctrl_op(mdev, MLX5_FPGA_CTRL_OPERATION_SANDBOX_BYPASS_OFF); in mlx5_fpga_device_brb()
204 int mlx5_fpga_device_start(struct mlx5_core_dev *mdev) in mlx5_fpga_device_start() argument
207 struct mlx5_fpga_device *fdev = mdev->fpga; in mlx5_fpga_device_start()
220 err = mlx5_fpga_caps(fdev->mdev); in mlx5_fpga_device_start()
228 fpga_id = MLX5_CAP_FPGA(fdev->mdev, fpga_id); in mlx5_fpga_device_start()
[all …]
H A Dcore.h59 struct mlx5_core_dev *mdev; member
85 dev_dbg(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d:(pid %d): " format, \
89 dev_err(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d:(pid %d): " format, \
93 dev_warn(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d:(pid %d): " format, \
97 dev_warn_ratelimited(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d: " \
101 dev_notice(&(__adev)->mdev->pdev->dev, "FPGA: " format, ##__VA_ARGS__)
104 dev_info(&(__adev)->mdev->pdev->dev, "FPGA: " format, ##__VA_ARGS__)
106 int mlx5_fpga_init(struct mlx5_core_dev *mdev);
107 void mlx5_fpga_cleanup(struct mlx5_core_dev *mdev);
108 int mlx5_fpga_device_start(struct mlx5_core_dev *mdev);
[all …]
H A Dipsec.h40 void *mlx5_fpga_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev,
44 u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev);
45 unsigned int mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev);
46 int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
49 int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev);
50 void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev);
54 static inline void *mlx5_fpga_ipsec_sa_cmd_exec(struct mlx5_core_dev *mdev, in mlx5_fpga_ipsec_sa_cmd_exec() argument
65 static inline u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev) in mlx5_fpga_ipsec_device_caps() argument
71 mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev) in mlx5_fpga_ipsec_counters_count() argument
76 static inline int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev, in mlx5_fpga_ipsec_counters_read() argument
[all …]
H A Dmlx5fpga_sdk.c141 if (!fdev->mdev) in mlx5_fpga_mem_read_i2c()
147 err = mlx5_fpga_access_reg(fdev->mdev, actual_size, in mlx5_fpga_mem_read_i2c()
173 if (!fdev->mdev) in mlx5_fpga_mem_write_i2c()
179 err = mlx5_fpga_access_reg(fdev->mdev, actual_size, in mlx5_fpga_mem_write_i2c()
261 return mlx5_fpga_sbu_caps(fdev->mdev, buf, size); in mlx5_fpga_get_sbu_caps()
267 return (u64)MLX5_CAP_FPGA(fdev->mdev, fpga_ddr_size) << 10; in mlx5_fpga_ddr_size_get()
273 return MLX5_CAP64_FPGA(fdev->mdev, fpga_ddr_start_addr); in mlx5_fpga_ddr_base_get()
327 struct mlx5_core_dev *mdev = fdev->mdev; in mlx5_fpga_device_reload_cmd() local
335 err = mlx5_fpga_ctrl_op(mdev, MLX5_FPGA_CTRL_OPERATION_RELOAD); in mlx5_fpga_device_reload_cmd()
350 err = mlx5_fpga_device_start(mdev); in mlx5_fpga_device_reload_cmd()
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt76x0/
H A Dpci.c167 struct mt76_dev *mdev; in mt76x0e_probe() local
186 mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt76x0e_ops, in mt76x0e_probe()
188 if (!mdev) in mt76x0e_probe()
191 dev = container_of(mdev, struct mt76x02_dev, mt76); in mt76x0e_probe()
194 mt76_mmio_init(mdev, pcim_iomap_table(pdev)[0]); in mt76x0e_probe()
196 mdev->rev = mt76_rr(dev, MT_ASIC_VERSION); in mt76x0e_probe()
197 dev_info(mdev->dev, "ASIC revision: %08x\n", mdev->rev); in mt76x0e_probe()
201 ret = devm_request_irq(mdev->dev, pdev->irq, mt76x02_irq_handler, in mt76x0e_probe()
231 struct mt76_dev *mdev = pci_get_drvdata(pdev); in mt76x0e_remove() local
232 struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76); in mt76x0e_remove()
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/freebsd/sys/dev/mlx5/mlx5_accel/
H A Dmlx5_ipsec.c68 struct mlx5_core_dev *mdev = mlx5e_ipsec_sa2dev(sa_entry); in mlx5e_ipsec_handle_counters_onedir() local
70 mlx5_fc_query(mdev, ipsec_rule->fc, packets, bytes); in mlx5e_ipsec_handle_counters_onedir()
249 static int mlx5e_xfrm_validate_state(struct mlx5_core_dev *mdev, in mlx5e_xfrm_validate_state() argument
256 if (!(mlx5_ipsec_device_caps(mdev) & in mlx5e_xfrm_validate_state()
258 mlx5_core_err(mdev, "FULL offload is not supported\n"); in mlx5e_xfrm_validate_state()
264 mlx5_core_err(mdev, "Cannot offload authenticated xfrm states\n"); in mlx5e_xfrm_validate_state()
268 mlx5_core_err(mdev, "Only IPSec aes-gcm-16 encryption protocol may be offloaded\n"); in mlx5e_xfrm_validate_state()
272 mlx5_core_err(mdev, "Cannot offload compressed xfrm states\n"); in mlx5e_xfrm_validate_state()
276 mlx5_core_err(mdev, "Cannot offload xfrm states with AEAD key length other than 128/256 bits\n"); in mlx5e_xfrm_validate_state()
281 mlx5_core_err(mdev, "Only IPv4/6 xfrm states may be offloaded\n"); in mlx5e_xfrm_validate_state()
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H A Dmlx5_ipsec_fs.c235 ipsec_chains_create(struct mlx5_core_dev *mdev, struct mlx5_flow_table *miss_ft, in ipsec_chains_create() argument
251 chains = mlx5_chains_create(mdev, &attr); in ipsec_chains_create()
302 static int ipsec_miss_create(struct mlx5_core_dev *mdev, in ipsec_miss_create() argument
326 mlx5_core_err(mdev, "fail to create IPsec miss_group err=%d\n", in ipsec_miss_create()
340 mlx5_core_err(mdev, "fail to create IPsec miss_rule err=%d\n", in ipsec_miss_create()
350 static int setup_modify_header(struct mlx5_core_dev *mdev, u32 val, u8 dir, in setup_modify_header() argument
377 modify_hdr = mlx5_modify_header_alloc(mdev, ns_type, 1, action); in setup_modify_header()
379 mlx5_core_err(mdev, "Failed to allocate modify_header %ld\n", in setup_modify_header()
438 static int setup_pkt_reformat(struct mlx5_core_dev *mdev, in setup_pkt_reformat() argument
461 mlx5_packet_reformat_alloc(mdev, &reformat_params, ns_type); in setup_pkt_reformat()
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