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Searched refs:isVectorLoadExtDesirable (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.h77 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
H A DWebAssemblyISelLowering.cpp820 bool WebAssemblyTargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const { in isVectorLoadExtDesirable() function in WebAssemblyTargetLowering
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h469 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
H A DARMISelLowering.cpp19420 bool ARMTargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const { in isVectorLoadExtDesirable() function in ARMTargetLowering
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h1374 bool isVectorLoadExtDesirable(SDValue) const override;
H A DX86ISelLowering.cpp34326 bool X86TargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const { in isVectorLoadExtDesirable() function in X86TargetLowering
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h1299 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
H A DAArch64ISelLowering.cpp6110 bool AArch64TargetLowering::isVectorLoadExtDesirable(SDValue ExtVal) const { in isVectorLoadExtDesirable() function in AArch64TargetLowering
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h3203 virtual bool isVectorLoadExtDesirable(SDValue ExtVal) const { return false; } in isVectorLoadExtDesirable() function
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp7213 TLI.isVectorLoadExtDesirable(SDValue(SDValue(GN0, 0)))) { in visitAND()
13065 !TLI.isVectorLoadExtDesirable(SDValue(N, 0))) in CombineExtLoad()
13322 DoXform &= TLI.isVectorLoadExtDesirable(SDValue(N, 0)); in tryToFoldExtOfLoad()
13360 if (!TLI.isVectorLoadExtDesirable(SDValue(N, 0))) in tryToFoldExtOfMaskedLoad()
14822 TLI.isVectorLoadExtDesirable(SDValue(SDValue(GN0, 0)))) { in visitSIGN_EXTEND_INREG()