/freebsd/contrib/llvm-project/llvm/lib/DebugInfo/PDB/Native/ |
H A D | NativeSymbolEnumerator.cpp | 83 assert(Record.Value.isSignedIntN(BT.getLength() * 8)); in getValue()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelDAGToDAG.cpp | 562 if (( Signed && ImmValue.isSignedIntN(ImmBitSize)) || in selectVSplatCommon() 1140 if (SplatValue.isSignedIntN(10)) { in trySelect() 1145 } else if (SplatValue.isSignedIntN(16) && in trySelect() 1175 } else if (SplatValue.isSignedIntN(32) && SplatBitSize == 32) { in trySelect() 1196 } else if (SplatValue.isSignedIntN(32) && SplatBitSize == 64 && in trySelect() 1224 } else if (SplatValue.isSignedIntN(64)) { in trySelect()
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H A D | MipsInstructionSelector.cpp | 161 if (Imm.isSignedIntN(16)) { in materialize32BitImm() 451 if (OffsetValue.isSignedIntN(16)) { in select()
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelDAGToDAG.cpp | 133 if (SplatValue.isSignedIntN(10)) { in INITIALIZE_PASS() 362 if (IsSigned && ImmValue.isSignedIntN(ImmBitSize)) { in selectVSplatImm()
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/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
H A D | APSInt.h | 94 return isSigned() ? isSignedIntN(64) : isIntN(63); in isRepresentableByInt64()
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H A D | APInt.h | 415 bool isSignedIntN(unsigned N) const { return getSignificantBits() <= N; } in isSignedIntN() function
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/freebsd/contrib/llvm-project/lldb/source/Utility/ |
H A D | Scalar.cpp | 659 fits = integer.isSignedIntN(byte_size * 8); in SetValueFromCString()
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
H A D | TargetInfo.h | 1143 return Value.isSignedIntN(32) && ImmSet.contains(Value.getZExtValue()); in isValidAsmImmediate()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonConstPropagation.cpp | 2894 if (!constToInt(L.Value, A) || !A.isSignedIntN(64)) in rewriteHexConstDefs() 2914 if (A.isSignedIntN(8)) { in rewriteHexConstDefs() 3016 if (!constToInt(LI.Value, A) || !A.isSignedIntN(8)) in rewriteHexConstUses()
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H A D | HexagonVectorCombine.cpp | 2735 if (V.isSignedIntN(8 * sizeof(int))) in calculatePointerDifference()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCLoopInstrFormPrep.cpp | 1337 if (ConstInt.isSignedIntN(16) && ConstInt.srem(4) != 0) in runOnLoop()
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H A D | PPCInstrInfo.cpp | 4537 if (III.SignedImm && !ActualValue.isSignedIntN(III.ImmWidth)) in isImmElgibleForForwarding() 4980 if (!ActualValue.isSignedIntN(III.ImmWidth)) in transformToImmFormFedByLI()
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H A D | PPCISelLowering.cpp | 17484 if (!ConstNode->getAPIntValue().isSignedIntN(64)) in decomposeMulByConstant() 18272 if (ConstImm.isSignedIntN(32)) { // Flag to handle 32-bit constants. in computeFlagsForAddressComputation() 18277 if (ConstImm.isSignedIntN(34)) // Flag to handle 34-bit constants. in computeFlagsForAddressComputation() 18291 if (ConstImm.isSignedIntN(16)) { in computeFlagsForAddressComputation() 18296 if (ConstImm.isSignedIntN(34)) in computeFlagsForAddressComputation()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 678 if (Imm->getAPIntValue().isSignedIntN(8)) in IsProfitableToFold() 703 (-Imm->getAPIntValue()).isSignedIntN(8)) in IsProfitableToFold() 707 (-Imm->getAPIntValue()).isSignedIntN(8) && in IsProfitableToFold()
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H A D | X86TargetTransformInfo.cpp | 5770 if ((Idx == 1) && Imm.getBitWidth() <= 64 && Imm.isSignedIntN(32)) in getIntImmCostIntrin() 5774 if ((Idx < 2) || (Imm.getBitWidth() <= 64 && Imm.isSignedIntN(64))) in getIntImmCostIntrin() 5779 if ((Idx < 4) || (Imm.getBitWidth() <= 64 && Imm.isSignedIntN(64))) in getIntImmCostIntrin()
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H A D | X86ISelLowering.cpp | 22727 if ((COp0 && !COp0->getAPIntValue().isSignedIntN(8)) || in EmitCmp() 22728 (COp1 && !COp1->getAPIntValue().isSignedIntN(8))) { in EmitCmp() 23894 if (Op1ValPlusOne.isSignedIntN(32) && in LowerSETCC() 23895 (!Op1Val.isSignedIntN(8) || Op1ValPlusOne.isSignedIntN(8))) { in LowerSETCC() 55181 if (Mask.isSignedIntN(32)) { in combineCMP() 55725 (V.getConstantOperandAPInt(0).isSignedIntN(32) && in pushAddIntoCmovOfConsts() 55726 V.getConstantOperandAPInt(1).isSignedIntN(32)); in pushAddIntoCmovOfConsts()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | CodeGenPrepare.cpp | 4238 !isIVIncrement(ScaleReg, &LI) && CI->getValue().isSignedIntN(64)) { in matchScaledValue() 4299 if (Offset.isSignedIntN(64)) { in matchScaledValue() 5107 if (CI->getValue().isSignedIntN(64)) { in matchAddr()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 1959 return !Mask->getValue().isSignedIntN(12) && Mask->getValue().isPowerOf2(); in isMaskAndCmp0FoldingBeneficial() 13463 if (!ImmValMinus1.isSignedIntN(12)) in combineSubOfBoolean() 13831 if ((Imm + 1).isSignedIntN(12)) in performXORCombine() 15999 if (MaskVal.isPowerOf2() && !MaskVal.isSignedIntN(12)) in useInversedSetcc() 17475 !Const->getAPIntValue().sextOrTrunc(EltWidth).isSignedIntN(5))) in PerformDAGCombine() 17748 if (ShrunkMask.isSignedIntN(12)) in targetShrinkDemandedConstant() 17781 else if (!C->isOpaque() && MinSignedBits <= 32 && !ShrunkMask.isSignedIntN(32)) in targetShrinkDemandedConstant() 21367 if (Subtarget.hasStdExtZba() && !Imm.isSignedIntN(12) && in decomposeMulByConstant() 21374 if (!Imm.isSignedIntN(12) && Imm.countr_zero() < 12 && in decomposeMulByConstant() 21402 if (C1.isSignedIntN(1 in isMulAddWithConstProfitable() [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Support/ |
H A D | APInt.cpp | 946 if (isSignedIntN(width)) in truncSSat()
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 5176 if (!APInt(64, AM.BaseOffs).isSignedIntN(32)) in isLegalAddressingMode() 5671 return Val.isSignedIntN(OptSize); in AreMulWideOperandsDemotable()
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H A D | NVPTXISelDAGToDAG.cpp | 3758 if (!CN->getAPIntValue().isSignedIntN(32)) in SelectADDRri_imp()
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H A D | NVPTXInstrInfo.td | 969 return v.isSignedIntN(32); 979 return v.isSignedIntN(16);
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 1966 if (!Mask.isSignedIntN(32)) // Avoid large immediates. in EmitTest()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstructionCombining.cpp | 3807 : CaseVal.isSignedIntN(NewWidth); in visitSwitchInst()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 4984 if (!IsXReg && !(Simm.isIntN(32) || Simm.isSignedIntN(32))) in parseOperand()
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