/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsCCState.cpp | 162 if (Flags.isSRet()) { in PreAnalyzeFormalArgument() 189 if (Ins[i].Flags.isSRet()) { in PreAnalyzeFormalArgumentsForF128()
|
H A D | MipsCallLowering.cpp | 456 if (Arg.Flags[0].isSRet() && !Arg.Ty->isPointerTy()) in lowerCall()
|
H A D | MipsFastISel.cpp | 1513 if (Flag.isInReg() || Flag.isSRet() || Flag.isNest() || Flag.isByVal()) in fastLowerCall()
|
H A D | MipsISelLowering.cpp | 3773 if (Ins[InsIdx].Flags.isSRet()) { in LowerFormalArguments()
|
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetCallingConv.h | 82 bool isSRet() const { return IsSRet; } in isSRet() function
|
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
H A D | TargetCallingConv.td | 92 class CCIfSRet<CCAction A> : CCIf<"ArgFlags.isSRet()", A> {}
|
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 48 assert (ArgFlags.isSRet()); in CC_Sparc_Assign_SRet() 452 if (Ins[InIdx].Flags.isSRet()) { in LowerFormalArguments_32() 807 if (!Outs.empty() && Caller.hasStructRetAttr() != Outs[0].Flags.isSRet()) in IsEligibleForTailCallOptimization() 927 if (Flags.isSRet()) { in LowerCall_32()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
H A D | M68kISelLowering.cpp | 239 if (!Flags.isSRet()) in callIsStructReturn() 253 if (!Flags.isSRet()) in argsAreStructReturn() 996 if (Ins[i].Flags.isSRet()) { in LowerFormalArguments()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLoweringCall.cpp | 1217 if (!Flags.isSRet() || Flags.isInReg()) in hasCalleePopSRet() 1841 if (Ins[I].Flags.isSRet()) { in LowerFormalArguments()
|
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CallLowering.cpp | 142 if (OrigArg.Flags[0].isSRet() && isa<Instruction>(&Arg)) in lowerCall()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 708 if (Ins[i].Flags.isSRet()) { in LowerCCCArguments()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 1614 if (Flags.isInReg() || Flags.isSRet() || Flags.isNest() || Flags.isByVal()) in fastLowerCall()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 1097 Outs[0].Flags.isSRet()) { in LowerCall()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 416 bool IsStructRet = Outs.empty() ? false : Outs[0].Flags.isSRet(); in LowerCall()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 3193 if (Flag.isInReg() || Flag.isSRet() || Flag.isNest() || Flag.isByVal() || in fastLowerCall()
|
H A D | AArch64ISelLowering.cpp | 7629 Ins[I].Flags.isSRet()) { in LowerFormalArguments()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelLowering.cpp | 5237 auto IsCalleeStructRet = Outs.empty() ? false : Outs[0].Flags.isSRet(); in isEligibleForTailCallOptimization()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 2383 bool isStructRet = (Outs.empty()) ? false : Outs[0].Flags.isSRet(); in LowerCall() 3056 bool isCalleeStructRet = Outs.empty() ? false : Outs[0].Flags.isSRet(); in IsEligibleForTailCallOptimization()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 3071 if (Arg.Flags.isSRet()) { in LowerFormalArguments()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 19860 auto IsCalleeStructRet = Outs.empty() ? false : Outs[0].Flags.isSRet(); in isEligibleForTailCallOptimization()
|