| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrAnalysis.h | 76 virtual bool isReturn(const MCInst &Inst) const { in isReturn() function 77 return Info->get(Inst.getOpcode()).isReturn(); in isReturn() 86 if (isBranch(Inst) || isCall(Inst) || isReturn(Inst) || in mayAffectControlFlow()
|
| H A D | MCInstrDesc.h | 277 bool isReturn() const { return Flags & (1ULL << MCID::Return); } in isReturn() function
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiDelaySlotFiller.cpp | 198 assert((!MI->isCall() && !MI->isReturn()) && in delayHasHazard() 227 unsigned E = MI->isCall() || MI->isReturn() ? MCID.getNumOperands() in insertDefsUses() 247 if (MI->isCall() || MI->isReturn()) in insertDefsUses()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86PadShortFunction.cpp | 145 assert(ReturnLoc->isReturn() && !ReturnLoc->isCall() && in runOnMachineFunction() 197 if (MI.isReturn() && !MI.isCall()) { in cyclesUntilReturn()
|
| H A D | X86AvoidTrailingCall.cpp | 79 return MI.isCall() && !MI.isReturn(); in isCallInstruction()
|
| H A D | X86InstrControl.td | 21 let isTerminator = 1, isReturn = 1, isBarrier = 1, 279 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, 301 let isCall = 1, isTerminator = 1, isReturn = 1, isBranch = 1, 352 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, 403 let isTerminator = 1, isReturn = 1, isBarrier = 1 in { 433 let isCall = 1, isTerminator = 1, isReturn = 1, isBranch = 1,
|
| H A D | X86VZeroUpper.cpp | 207 bool IsReturn = MI.isReturn(); in processBasicBlock()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMCTargetDesc.cpp | 138 bool isReturn(const MCInst &Inst) const override { in isReturn() function in __anond44693ea0111::LoongArchMCInstrAnalysis 139 if (MCInstrAnalysis::isReturn(Inst)) in isReturn()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrCall.td | 69 let isReturn = 1, isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in 76 let isReturn = 1, isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in
|
| H A D | WebAssemblyInstrControl.td | 96 let isReturn = 1 in { 106 } // isReturn = 1
|
| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCInstrDesc.cpp | 22 if (isBranch() || isCall() || isReturn() || isIndirectBranch()) in mayAffectControlFlow()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMOptimizeBarriersPass.cpp | 45 MI->isReturn()); in CanMovePastDMB()
|
| H A D | ARMSLSHardening.cpp | 278 assert(isIndirectCall(IndirectCall) && !IndirectCall.isReturn()); in ConvertIndirectCallToIndirectJump() 373 if (isIndirectCall(MI) && !MI.isReturn()) { in hardenIndirectCalls()
|
| H A D | Thumb2ITBlockPass.cpp | 231 (!MI->isBranch() && !MI->isReturn()) ; ++MBBI) { in InsertITInstructions()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoXqccmp.td | 106 let hasSideEffects = 0, mayLoad = 1, mayStore = 0, isReturn = 1, 113 let hasSideEffects = 0, mayLoad = 1, mayStore = 0, isReturn = 1,
|
| H A D | RISCVInstrInfoZc.td | 240 let hasSideEffects = 0, mayLoad = 1, mayStore = 0, isReturn = 1, 247 let hasSideEffects = 0, mayLoad = 1, mayStore = 0, isReturn = 1,
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | XRayInstrumentation.cpp | 125 if (T.isReturn() && in replaceRetWithPatchableRet() 158 if (T.isReturn() && in prependRetWithPatchableExit()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCTargetDesc.cpp | 264 bool isReturn(const MCInst &Inst) const override { in isReturn() function in __anon4993c57e0111::RISCVMCInstrAnalysis 265 if (MCInstrAnalysis::isReturn(Inst)) in isReturn()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrControl.td | 320 let isReturn = 1 in 326 let isReturn = 1 in 337 let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 in { 350 } // isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonShuffler.cpp | 501 if (HexagonMCInstrInfo::getDesc(MCII, ID).isReturn()) in GetPacketSummary() 560 if (HexagonMCInstrInfo::getDesc(MCII, Inst0).isReturn()) in GetPacketSummary() 562 if (HexagonMCInstrInfo::getDesc(MCII, Inst1).isReturn()) in GetPacketSummary()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.cpp | 211 } else if (I->isReturn()) { in analyzeBranch() 222 isJumpOpcode(I->getOpcode()) || I->isReturn())) { in analyzeBranch()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPseudo.td | 255 let isReturn = 1, isTerminator = 1, isBarrier = 1, hasSideEffects = 0, 260 let isPseudo = 1, isCall = 1, isReturn = 1, isBarrier = 1, isPredicable = 0, 266 let isPseudo = 1, isCall = 1, isReturn = 1, isBarrier = 1, isPredicable = 0, 319 let isTerminator = 1, hasSideEffects = 0, isReturn = 1, isCodeGenOnly = 1, 374 let isCall = 1, isBarrier = 1, isReturn = 1, isTerminator = 1,
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SpeculationHardening.cpp | 288 if (!MI.isReturn() && !MI.isCall()) in instrumentControlFlow() 311 if (MI.isReturn()) in instrumentControlFlow()
|
| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | InstrDocsEmitter.cpp | 110 FLAG(isReturn) in EmitInstrDocs()
|
| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenInstruction.h | 240 bool isReturn : 1; variable
|