| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPseudo.td | 161 let isCall = 1, hasSideEffects = 1, isPredicable = 0,
178 isPredicable = 0 in
229 let isPredicable = 0; // !if(isPred, 0, 1);
242 isPredicable = 1, hasSideEffects = 0, InputType = "reg",
256 isCodeGenOnly = 1, Defs = [PC], Uses = [R28], isPredicable = 0 in
260 let isPseudo = 1, isCall = 1, isReturn = 1, isBarrier = 1, isPredicable = 0,
266 let isPseudo = 1, isCall = 1, isReturn = 1, isBarrier = 1, isPredicable = 0,
359 isPredicable = 1,
375 Defs = [R29, R30, R31, PC], isPredicable = 0, isAsmParserOnly = 1 in {
|
| H A D | HexagonExpandCondsets.cpp | 216 bool isPredicable(MachineInstr *MI);
727 bool HexagonExpandCondsets::isPredicable(MachineInstr *MI) { in isPredicable() function in HexagonExpandCondsets
728 if (HII->isPredicated(*MI) || !HII->isPredicable(*MI)) in isPredicable()
967 if (!DefI || !isPredicable(DefI)) in predicate()
1233 if (!RDef || !HII->isPredicable(*RDef)) { in coalesceSegments()
1244 if (!RDef || !HII->isPredicable(*RDef)) { in coalesceSegments()
|
| H A D | HexagonEarlyIfConv.cpp | 475 if (!HII->isPredicable(*Def1) || !HII->isPredicable(*Def3)) in computePhiCost()
672 return MI->mayStore() && HII->isPredicable(const_cast<MachineInstr&>(*MI)); in isPredicableStore()
|
| H A D | HexagonDepInstrInfo.td | 57 let isPredicable = 1;
221 let isPredicable = 1;
307 let isPredicable = 1;
345 let isPredicable = 1;
357 let isPredicable = 1;
432 let isPredicable = 1;
592 let isPredicable = 1;
1068 let isPredicable = 1;
1403 let isPredicable = 1;
1415 let isPredicable = 1;
[all …]
|
| H A D | HexagonInstrInfo.h | 248 bool isPredicable(const MachineInstr &MI) const override;
|
| /freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/ |
| H A D | CodeGenInstruction.h | 154 bool isPredicable; variable
259 bool isPredicable : 1; variable
|
| H A D | CodeGenInstruction.cpp | 26 isPredicable = false; in CGIOperandList()
113 isPredicable = true; in CGIOperandList()
448 isPredicable = !R->getValueAsBit("isUnpredicable") && in CodeGenInstruction()
449 (Operands.isPredicable || R->getValueAsBit("isPredicable")); in CodeGenInstruction()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 340 bool isPredicable() const { return Flags & (1ULL << MCID::Predicable); } in isPredicable() function
613 if (isPredicable()) { in findFirstPredOperandIdx()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2SizeReduction.cpp | 804 if (!NewMCID.isPredicable()) in ReduceTo2Addr()
808 SkipPred = !NewMCID.isPredicable(); in ReduceTo2Addr()
896 if (!NewMCID.isPredicable()) in ReduceToNarrow()
900 SkipPred = !NewMCID.isPredicable(); in ReduceToNarrow()
965 if (!MCID.isPredicable() && NewMCID.isPredicable()) in ReduceToNarrow()
|
| H A D | ARMInstrCDE.td | 65 let isPredicable = 0;
77 let isPredicable = acc;
|
| H A D | ARMConstantIslandPass.cpp | 654 MI->getOperand(NumOps - (MI->isPredicable() ? 2 : 1)); in doInitialJumpTablePlacement()
2220 unsigned JTOpIdx = NumOps - (MI->isPredicable() ? 2 : 1); in optimizeThumb2JumpTables()
2415 unsigned JTOpIdx = NumOps - (MI->isPredicable() ? 2 : 1); in reorderThumb2JumpTables()
|
| H A D | ThumbRegisterInfo.cpp | 675 if (MI.isPredicable()) in eliminateFrameIndex()
|
| H A D | ARMBaseInstrInfo.h | 182 bool isPredicable(const MachineInstr &MI) const override;
|
| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | InstrDocsEmitter.cpp | 127 FLAG(isPredicable) in EmitInstrDocs()
|
| H A D | InstrInfoEmitter.cpp | 1165 if (Inst.isPredicable) in emitRecord()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.h | 183 bool isPredicable(const MachineInstr &MI) const override;
|
| H A D | R600InstrInfo.cpp | 839 bool R600InstrInfo::isPredicable(const MachineInstr &MI) const { in isPredicable() function in R600InstrInfo
857 return TargetInstrInfo::isPredicable(MI); in isPredicable()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.h | 264 bool isPredicable(const MachineInstr &MI) const override;
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1723 virtual bool isPredicable(const MachineInstr &MI) const { in isPredicable() function
1724 return MI.getDesc().isPredicable(); in isPredicable()
|
| H A D | MachineInstr.h | 1010 bool isPredicable(QueryType Type = AllInBundle) const {
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ImplicitNullChecks.cpp | 371 if (!MI.mayLoadOrStore() || MI.isPredicable()) in isSuitableMemoryOp()
|
| H A D | TargetInstrInfo.cpp | 359 if (!MI.isPredicable()) in isUnpredicatedTerminator()
372 if (!MI.isPredicable()) in PredicateInstruction()
|
| H A D | EarlyIfConversion.cpp | 331 if (!TII->isPredicable(*I)) { in canPredicateInstrs()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 468 if (!MI->isPredicable()) in canFoldIntoSelect()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstr64Bit.td | 77 let isReturn = 1, isPredicable = 1, Uses = [LR8, RM] in
81 let isPredicable = 1 in
160 let isPredicable = 1 in
207 let isPredicable = 1 in
|