| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CodeGenCommonISel.cpp | 56 if (!MI.isCopy() && !MI.isImplicitDef()) { in MIIsInTerminatorSequence()
95 if (MI.isImplicitDef()) in MIIsInTerminatorSequence()
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| H A D | ProcessImplicitDefs.cpp | 153 if (MI.isImplicitDef()) in runOnMachineFunction()
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| H A D | DetectDeadLanes.cpp | 311 if (lowersToCopies(MODefMI) || MODefMI.isImplicitDef()) in determineInitialDefinedLanes()
325 if (DefMI.isImplicitDef() || Def.isDead()) in determineInitialDefinedLanes()
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| H A D | MachineLICM.cpp | 946 if (MI->isImplicitDef()) in calcRegisterCost()
1254 if (MI.isImplicitDef()) in IsProfitableToHoist()
1509 if (MI->isImplicitDef()) in EliminateCSE()
1581 if (CI == Map.second.end() || MI->isImplicitDef()) in MayCSE()
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| H A D | MachineLateInstrsCleanup.cpp | 161 if (!MI->isSafeToMove(nullptr, SawStore) || MI->isImplicitDef() || in isCandidate()
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| H A D | PHIElimination.cpp | 318 if (!DI.isImplicitDef()) in isImplicitlyDefined()
594 if (DefMI->isImplicitDef()) in LowerPHINode()
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| H A D | CalcSpillWeights.cpp | 248 if (identityCopy || MI->isImplicitDef()) in weightCalcHelper()
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| H A D | RegisterCoalescer.cpp | 1344 if (!DefMI->isImplicitDef()) { in reMaterializeTrivialDef()
2010 if (UndefMI->isImplicitDef()) in joinCopy()
2524 assert(ImpDef.isImplicitDef()); in mustKeepImplicitDef()
2763 if (DefMI->isImplicitDef()) { in analyzeValue()
2797 if (DefMI->isImplicitDef()) { in analyzeValue()
2904 if (DefMI->isImplicitDef()) in analyzeValue()
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| H A D | MachineCSE.cpp | 408 if (MI->isPosition() || MI->isPHI() || MI->isImplicitDef() || MI->isKill() || in isCSECandidate()
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| H A D | MLRegallocEvictAdvisor.cpp | |
| H A D | MLRegAllocEvictAdvisor.cpp | 816 if (MI->isIdentityCopy() || MI->isImplicitDef()) in getLIFeatureComponents()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyOptimizeLiveIntervals.cpp | 115 if (MI.isImplicitDef() && MI.getOperand(0).isDead()) { in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 256 if (ECDef && ECDef->isImplicitDef()) { in optimizeSDPattern()
305 if (Def->isImplicitDef()) in optimizeSDPattern()
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| H A D | MLxExpansionPass.cpp | 336 if (MI->isPosition() || MI->isImplicitDef() || MI->isCopy()) in ExpandFPMLxInstructions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiDelaySlotFiller.cpp | 180 if (MI->isImplicitDef() || MI->isKill()) in delayHasHazard()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZLongBranch.cpp | 220 MI.isImplicitDef() || MI.getOpcode() == TargetOpcode::MEMBARRIER || in getInstSizeInBytes()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVLIWPacketizer.cpp | 868 if (PI.isImplicitDef()) in canPromoteToDotNew()
1056 if (MI.isImplicitDef()) in ignorePseudoInstruction()
1721 if (MI.isImplicitDef()) { in addToPacket()
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| H A D | HexagonNewValueJump.cpp | 139 if (II->isImplicitDef()) in INITIALIZE_PASS_DEPENDENCY()
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| H A D | HexagonAsmPrinter.cpp | 760 if (!MII->isDebugInstr() && !MII->isImplicitDef()) in emitInstruction()
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| H A D | HexagonEarlyIfConv.cpp | 411 if (DefI->isImplicitDef()) in usesUndefVReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600OptimizeVectorRegisters.cpp | 44 return MI && MI->isImplicitDef(); in isImplicitlyDef()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 236 if (candidate->isImplicitDef() || candidate->isKill()) in delayHasHazard()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 3583 static bool isImplicitDef(SDValue V) { in isImplicitDef() function
3588 if (!isImplicitDef(V.getOperand(I))) in isImplicitDef()
3730 if (Merge != False && !isImplicitDef(Merge)) in performCombineVMergeAndVOps()
3762 if (HasTiedDest && !isImplicitDef(True->getOperand(0))) { in performCombineVMergeAndVOps()
3898 uint64_t Policy = (isImplicitDef(Merge) && !MergeVLShrunk) in performCombineVMergeAndVOps()
3980 !isImplicitDef(N->getOperand(0))) in doPeepholeNoRegPassThru()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsDelaySlotFiller.cpp | 951 bool HasHazard = Candidate.isImplicitDef(); in delayHasHazard()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | RegBankSelect.cpp | 707 if (MI.isImplicitDef()) in assignRegisterBanks()
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