| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostSelectOptimize.cpp | 121 if (!MI.isCopy()) in foldSimpleCrossClassCopies()
166 if (!MI.isCopy()) in foldCopyDup()
193 if (!Use.isCopy()) in foldCopyDup()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineSink.cpp | 335 if (!MI.isCopy()) in PerformTrivialForwardCoalescing()
367 if (MI.isCopy() || MI.mayLoadOrStore() || in PerformSinkAndFold()
448 if (UseInst.isCopy()) { in PerformSinkAndFold()
518 if (SinkDst->isCopy()) { in PerformSinkAndFold()
572 assert((U->isCopy() || U->isDebugInstr()) && in PerformSinkAndFold()
574 if (U->isCopy()) in PerformSinkAndFold()
583 if (I->isCopy()) { in PerformSinkAndFold()
901 if (!MI.isCopy() && !TII->isAsCheapAsAMove(MI)) in isWorthBreakingCriticalEdge()
1591 if (!MI.isCopy()) { in SinkIntoCycle()
1793 if (MI.getMF()->getFunction().getSubprogram() && MI.isCopy()) in SinkInstruction()
[all …]
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| H A D | PeepholeOptimizer.cpp | 243 return MI.isCopy() || (!DisableAdvCopyOpt && in isCoalescableCopy()
270 if (!MI.isCopy()) in getCopySrc()
894 assert(MI.isCopy() && "Expected copy instruction"); in CopyRewriter()
1466 assert(MI.isCopy() && "expected a COPY machine instruction"); in foldRedundantCopy()
1508 assert(MI.isCopy() && "expected a COPY machine instruction"); in foldRedundantNAPhysCopy()
1726 if (!MI->isCopy()) { in runOnMachineFunction()
1789 if (MI->isCopy() && (foldRedundantCopy(*MI) || in runOnMachineFunction()
1883 assert(Def->isCopy() && "Invalid definition"); in getNextSourceFromCopy()
2131 if (Def->isCopy()) in getNextSourceImpl()
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| H A D | RegAllocScore.cpp | 101 if (MI.isCopy()) { in calculateRegAllocScore()
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| H A D | OptimizePHIs.cpp | 118 if (SrcMI && SrcMI->isCopy() && !SrcMI->getOperand(0).getSubReg() && in IsSingleValuePHICycle()
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| H A D | TwoAddressInstructionPass.cpp | 324 if (!Def || !Def->isCopy()) in isRevCopyChain()
367 if (MI.isCopy()) { in isCopyToReg()
587 if (MI->isCopy()) { in removeClobberedSrcRegMap()
937 if (!KillMI || MI == KillMI || KillMI->isCopy() || KillMI->isCopyLike()) in rescheduleMIBelowKill()
982 if (End->isCopy() && regOverlapsSet(Defs, End->getOperand(1).getReg())) in rescheduleMIBelowKill()
1077 if (DefMI.getParent() != MBB || DefMI.isCopy() || DefMI.isCopyLike()) in isDefTooClose()
1125 if (!KillMI || MI == KillMI || KillMI->isCopy() || KillMI->isCopyLike()) in rescheduleKillAboveMI()
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| H A D | LiveRangeShrink.cpp | |
| H A D | CodeGenCommonISel.cpp | 56 if (!MI.isCopy() && !MI.isImplicitDef()) { in MIIsInTerminatorSequence()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFixSGPRCopies.cpp | 278 if (!CopyUse.isCopy()) in foldVGPRCopyIntoRegSequence()
762 if (MI->isCopy()) { in runOnMachineFunction()
805 AllAGPRUses &= (UseMI->isCopy() && in processPHINode()
808 if (UseMI->isCopy() || UseMI->isRegSequence()) { in processPHINode()
931 if (Inst->isCopy() || Inst->isRegSequence()) { in analyzeVGPRToSGPRCopy()
933 if (!Inst->isCopy() || in analyzeVGPRToSGPRCopy()
945 (Inst->isCopy() && Inst->getOperand(0).getReg() == AMDGPU::SCC)) { in analyzeVGPRToSGPRCopy()
1102 if (!MI.isCopy()) in fixSCCCopies()
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| H A D | GCNNSAReassign.cpp | 214 if (Def && Def->isCopy() && Def->getOperand(1).getReg() == PhysReg) in CheckNSA()
221 if (UseInst->isCopy() && UseInst->getOperand(0).getReg() == PhysReg) in CheckNSA()
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| H A D | SIFoldOperands.cpp | 836 if (FoldingImmLike && UseMI->isCopy()) { in foldOperand()
889 if (UseMI->isCopy() && OpToFold.isReg() && in foldOperand()
1793 if (!SubDef || !SubDef->isCopy() || SubDef->getOperand(1).getSubReg()) in tryFoldRegSequence()
1801 while (UseMI->isCopy() && !Op->getSubReg()) { in tryFoldRegSequence()
1857 assert(Copy.isCopy()); in isAGPRCopy()
1876 if (!CopySrcDef || !CopySrcDef->isCopy()) in isAGPRCopy()
1934 if (!Copy || !Copy->isCopy()) in tryFoldPhiAGPR()
1971 if (Def->isCopy()) { in tryFoldPhiAGPR()
2050 if (!I->isCopy() && !I->isRegSequence()) in tryFoldLoad()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 163 if (MI->isCopy() && usesRegClass(MI->getOperand(1), in getPrefSPRLane()
241 if (MI->isCopy()) { in optimizeSDPattern()
262 if (EC && EC->isCopy() && in optimizeSDPattern()
325 if (MI->isCopy() && usesRegClass(MI->getOperand(1), &ARM::SPRRegClass)) in hasPartialWrite()
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| H A D | Thumb2ITBlockPass.cpp | 122 static bool isCopy(MachineInstr *MI) { in isCopy() function
138 if (!isCopy(MI)) in MoveCopyOutOfITBlock()
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| H A D | MLxExpansionPass.cpp | 126 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { in getDefReg()
336 if (MI->isPosition() || MI->isImplicitDef() || MI->isCopy()) in ExpandFPMLxInstructions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64StackTaggingPreRA.cpp | 187 } else if (UseI.isCopy() && UseI.getOperand(0).getReg().isVirtual()) { in uncheckUsesOf()
284 if (UseI.isCopy()) { in findFirstSlotCandidate()
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| H A D | AArch64RedundantCopyElimination.cpp | 322 if (PredI->isCopy()) { in optimizeBlock()
378 bool IsCopy = MI->isCopy(); in optimizeBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 350 if (MI->isCopy() && MI->getOperand(1).getReg().isPhysical()) { in apply()
358 if (MO.isUse() && !MI->isCopy() && in apply()
457 if (DstInst->isCopy()) in adjustSchedDependency()
465 if ((DstInst->isRegSequence() || DstInst->isCopy())) { in adjustSchedDependency()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZCopyPhysRegs.cpp | 74 if (!MI->isCopy()) in visitMBB()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastPreTileConfig.cpp | 232 if (UseMI->isCopy()) in reload()
256 if (UseMI->isCopy()) { in reload()
297 } else if (MI->isCopy()) { in getShape()
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| H A D | X86FastTileConfig.cpp | 88 if (MI.isDebugInstr() || MI.isCopy() || MI.getNumOperands() < 3 || in isTileDef()
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| H A D | X86LowerTileCopy.cpp | 93 if (!MI.isCopy()) in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVRedundantCopyElimination.cpp | 120 if (MI->isCopy() && MI->getOperand(0).isReg() && in optimizeBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCReduceCRLogicals.cpp | 544 if (!Copy->isCopy()) in lookThroughCRCopy()
620 if (CRI.TrueDefs.first->isCopy() || CRI.TrueDefs.second->isCopy() || in splitBlockOnBinaryCROp()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 1426 bool isCopy() const {
1431 return isCopy() && !getOperand(0).getSubReg() && !getOperand(1).getSubReg();
1441 return isCopy() || isSubregToReg();
1446 return isCopy() && getOperand(0).getReg() == getOperand(1).getReg() &&
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstrInfo.cpp | 249 assert(I->isCopy() && "Copy instruction is expected"); in copyPhysReg()
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