| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostSelectOptimize.cpp | 116 if (!MI.isCopy()) in foldSimpleCrossClassCopies()
161 if (!MI.isCopy()) in foldCopyDup()
188 if (!Use.isCopy()) in foldCopyDup()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFixSGPRCopies.cpp | 292 if (!CopyUse.isCopy()) in foldVGPRCopyIntoRegSequence()
778 if (MI->isCopy()) { in run()
822 AllAGPRUses &= (UseMI->isCopy() && in processPHINode()
825 if (UseMI->isCopy() || UseMI->isRegSequence()) { in processPHINode()
949 if (Inst->isCopy() || Inst->isRegSequence()) { in analyzeVGPRToSGPRCopy()
951 if (!Inst->isCopy() || in analyzeVGPRToSGPRCopy()
963 (Inst->isCopy() && Inst->getOperand(0).getReg() == AMDGPU::SCC)) { in analyzeVGPRToSGPRCopy()
1137 if (!MI.isCopy()) in fixSCCCopies()
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| H A D | AMDGPURegBankSelect.cpp | 106 if (!MI->isCopy() || MI->getNumImplicitOperands() != 1) in isTemporalDivergenceCopy()
234 if (MI.isCopy()) { in runOnMachineFunction()
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| H A D | GCNNSAReassign.cpp | 220 if (Def && Def->isCopy() && Def->getOperand(1).getReg() == PhysReg) in CheckNSA()
227 if (UseInst->isCopy() && UseInst->getOperand(0).getReg() == PhysReg) in CheckNSA()
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| H A D | SIFoldOperands.cpp | 1230 if (FoldingImmLike && UseMI->isCopy()) { in foldOperand()
1302 if (UseMI->isCopy() && OpToFold.isReg() && in foldOperand()
2005 if (OpToFold.isReg() && MI.isCopy() && !MI.getOperand(1).getSubReg()) { in tryFoldFoldableCopy()
2339 if (!SubDef || !SubDef->isCopy() || SubDef->getOperand(1).getSubReg()) in tryFoldRegSequence()
2347 while (UseMI->isCopy() && !Op->getSubReg()) { in tryFoldRegSequence()
2403 assert(Copy.isCopy()); in isAGPRCopy()
2422 if (!CopySrcDef || !CopySrcDef->isCopy()) in isAGPRCopy()
2480 if (!Copy || !Copy->isCopy()) in tryFoldPhiAGPR()
2517 if (Def->isCopy()) { in tryFoldPhiAGPR()
2595 if (!I->isCopy() && !I->isRegSequence()) in tryFoldLoad()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineSink.cpp | 375 if (!MI.isCopy()) in PerformTrivialForwardCoalescing()
407 if (MI.isCopy() || MI.mayLoadOrStore() || in PerformSinkAndFold()
488 if (UseInst.isCopy()) { in PerformSinkAndFold()
558 if (SinkDst->isCopy()) { in PerformSinkAndFold()
612 assert((U->isCopy() || U->isDebugInstr()) && in PerformSinkAndFold()
614 if (U->isCopy()) in PerformSinkAndFold()
623 if (I->isCopy()) { in PerformSinkAndFold()
912 if (!I->isCopy()) in run()
1041 if (!MI.isCopy() && !TII->isAsCheapAsAMove(MI)) in isWorthBreakingCriticalEdge()
1979 if (MI.getMF()->getFunction().getSubprogram() && MI.isCopy()) in SinkInstruction()
[all …]
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| H A D | PeepholeOptimizer.cpp | 197 assert(MI.isCopy() && "Expected copy instruction"); in CopyRewriter()
502 return MI.isCopy() || in isCoalescableCopy()
526 if (!MI.isCopy()) in getCopySrc()
1454 assert(MI.isCopy() && "expected a COPY machine instruction"); in foldRedundantCopy()
1496 assert(MI.isCopy() && "expected a COPY machine instruction"); in foldRedundantNAPhysCopy()
1739 if (!MI->isCopy()) { in run()
1802 if (MI->isCopy() && (foldRedundantCopy(*MI) || in run()
1895 assert(Def->isCopy() && "Invalid definition"); in getNextSourceFromCopy()
2137 if (Def->isCopy()) in getNextSourceImpl()
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| H A D | RegAllocScore.cpp | 102 if (MI.isCopy()) { in calculateRegAllocScore()
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| H A D | TwoAddressInstructionPass.cpp | 324 if (!Def || !Def->isCopy()) in isRevCopyChain()
367 if (MI.isCopy()) { in isCopyToReg()
590 if (MI->isCopy()) { in removeClobberedSrcRegMap()
939 if (!KillMI || MI == KillMI || KillMI->isCopy() || KillMI->isCopyLike()) in rescheduleMIBelowKill()
984 if (End->isCopy() && regOverlapsSet(Defs, End->getOperand(1).getReg())) in rescheduleMIBelowKill()
1079 if (DefMI.getParent() != MBB || DefMI.isCopy() || DefMI.isCopyLike()) in isDefTooClose()
1127 if (!KillMI || MI == KillMI || KillMI->isCopy() || KillMI->isCopyLike()) in rescheduleKillAboveMI()
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| H A D | OptimizePHIs.cpp | 133 if (SrcMI && SrcMI->isCopy() && !SrcMI->getOperand(0).getSubReg() && in IsSingleValuePHICycle()
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| H A D | CodeGenCommonISel.cpp | 56 if (!MI.isCopy() && !MI.isImplicitDef()) { in MIIsInTerminatorSequence()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 164 if (MI->isCopy() && usesRegClass(MI->getOperand(1), in getPrefSPRLane()
242 if (MI->isCopy()) { in optimizeSDPattern()
263 if (EC && EC->isCopy() && in optimizeSDPattern()
326 if (MI->isCopy() && usesRegClass(MI->getOperand(1), &ARM::SPRRegClass)) in hasPartialWrite()
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| H A D | Thumb2ITBlockPass.cpp | 118 static bool isCopy(MachineInstr *MI) { in isCopy() function
134 if (!isCopy(MI)) in MoveCopyOutOfITBlock()
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| H A D | MLxExpansionPass.cpp | 126 while (UseMI->isCopy() || UseMI->isInsertSubreg()) { in getDefReg()
336 if (MI->isPosition() || MI->isImplicitDef() || MI->isCopy()) in ExpandFPMLxInstructions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64StackTaggingPreRA.cpp | 181 } else if (UseI.isCopy() && UseI.getOperand(0).getReg().isVirtual()) { in uncheckUsesOf()
278 if (UseI.isCopy()) { in findFirstSlotCandidate()
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| H A D | AArch64RedundantCopyElimination.cpp | 318 if (PredI->isCopy()) { in optimizeBlock()
374 bool IsCopy = MI->isCopy(); in optimizeBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZCopyPhysRegs.cpp | 69 if (!MI->isCopy()) in visitMBB()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.cpp | 349 if (MI->isCopy() && MI->getOperand(1).getReg().isPhysical()) { in apply()
357 if (MO.isUse() && !MI->isCopy() && in apply()
458 if (DstInst->isCopy()) in adjustSchedDependency()
466 if ((DstInst->isRegSequence() || DstInst->isCopy())) { in adjustSchedDependency()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVVMV0Elimination.cpp | 131 SrcMI->isCopy() && SrcMI->getOperand(1).getReg().isVirtual() && in runOnMachineFunction()
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| H A D | RISCVRedundantCopyElimination.cpp | 116 if (MI->isCopy() && MI->getOperand(0).isReg() && in optimizeBlock()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastPreTileConfig.cpp | 231 if (UseMI->isCopy()) in reload()
255 if (UseMI->isCopy()) { in reload()
308 } else if (MI->isCopy()) { in getShape()
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| H A D | X86LowerTileCopy.cpp | 91 if (!MI.isCopy()) in runOnMachineFunction()
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| H A D | X86FastTileConfig.cpp | 85 if (MI.isDebugInstr() || MI.isCopy() || MI.getNumOperands() < 3 || in getNumDefTiles()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCReduceCRLogicals.cpp | 551 if (!Copy->isCopy()) in lookThroughCRCopy()
617 if (CRI.TrueDefs.first->isCopy() || CRI.TrueDefs.second->isCopy() || in splitBlockOnBinaryCROp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstrInfo.cpp | 280 assert(I->isCopy() && "Copy instruction is expected"); in copyPhysReg()
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