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Searched refs:isAllocatable (Results 1 – 25 of 40) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.td368 let isAllocatable = 0;
375 let isAllocatable = 0;
382 let isAllocatable = 0;
398 let isAllocatable = 0;
456 let isAllocatable = 0;
464 let isAllocatable = 0;
614 let isAllocatable = 0;
682 let isAllocatable = 0;
743 let isAllocatable = 0;
751 let isAllocatable = 0;
[all …]
H A DGCNRewritePartialRegUses.cpp211 if (RC->isAllocatable() && TRI->isRegClassAligned(RC, AlignNumBits)) in getAllocatableAndAlignedRegClassMask()
234 << (SubRegRC->isAllocatable() ? "" : " not alloc") in getRegClassWithShiftedSubregs()
239 assert(SubRegRC->isAllocatable()); in getRegClassWithShiftedSubregs()
282 assert(MinRC->isAllocatable() && TRI->isRegClassAligned(MinRC, RCAlign)); in getRegClassWithShiftedSubregs()
H A DR600RegisterInfo.td163 let isAllocatable = 0 in {
209 } // End isAllocatable = 0
H A DGCNNSAReassign.cpp130 if (!MRI->isAllocatable(Reg)) in canAssign()
H A DSIFrameLowering.cpp419 MRI.isAllocatable(Reg) && !TRI->isSubRegisterEq(Reg, GITPtrLoReg)) { in emitEntryFunctionFlatScratchInit()
578 if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) && in getEntryFunctionReservedScratchRsrcReg()
674 if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) && in emitEntryFunctionPrologue()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp193 if (!RC || RC->isAllocatable()) in getAllocatableClass()
199 if (SubRC->isAllocatable()) in getAllocatableClass()
247 assert(RC->isAllocatable() && "invalid for nonallocatable sets"); in getAllocatableSetForRC()
263 if (C->isAllocatable()) in getAllocatableSet()
H A DMachineRegisterInfo.cpp60 assert(RC && RC->isAllocatable() && "Invalid RC for virtual register"); in setRegClass()
162 assert(RegClass->isAllocatable() && in createVirtualRegister()
539 if (!def_empty(*AI) || isAllocatable(*AI)) in isConstantPhysReg()
H A DCalcSpillWeights.cpp293 if (HintReg.isVirtual() || MRI.isAllocatable(HintReg)) in weightCalcHelper()
H A DAggressiveAntiDepBreaker.cpp627 if (!MRI.isAllocatable(NewSuperReg)) continue; in FindSuitableFreeRegisters()
832 if (!MRI.isAllocatable(AntiDepReg)) { in BreakAntiDependencies()
H A DCriticalAntiDepBreaker.cpp561 if (!MRI.isAllocatable(AntiDepReg)) in BreakAntiDependencies()
H A DRegisterPressure.cpp523 } else if (MRI.isAllocatable(Reg)) { in pushReg()
558 } else if (MRI.isAllocatable(Reg)) { in pushRegLanes()
H A DRegAllocFast.cpp902 if (Hint0.isPhysical() && MRI->isAllocatable(Hint0) && RC.contains(Hint0) && in allocVirtReg()
920 if (Hint1.isPhysical() && MRI->isAllocatable(Hint1) && RC.contains(Hint1) && in allocVirtReg()
H A DMachineCSE.cpp356 if (MRI->isAllocatable(PhysDefs[i].second) || in PhysRegDefsReach()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td558 let Size = 32, isAllocatable = 0 in
569 let isAllocatable = 0 in
572 let Size = 64, isAllocatable = 0 in
577 let Size = 32, isAllocatable = 0 in
587 let Size = 64, isAllocatable = 0 in
596 let Size = 32, isAllocatable = 0 in
615 let Size = 64, isAllocatable = 0 in
632 let isAllocatable = 0 in
638 let Size = 32, isAllocatable = 0 in
H A DHexagonBlockRanges.cpp225 if (RC->isAllocatable()) in HexagonBlockRanges()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.td57 let isAllocatable = 0;
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterInfo.td556 let isAllocatable = 0 in
568 let isAllocatable = 0 in
755 let isAllocatable = 0;
762 let isAllocatable = 0;
779 let isAllocatable = 0;
783 let isAllocatable = 0;
787 let isAllocatable = 0;
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.td62 let isAllocatable = 0;
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchRegisterInfo.td187 let isAllocatable = false in
215 let isAllocatable = false, RegInfos = GRLenRI in
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.td43 let isAllocatable = allocatable in
322 let isAllocatable = 0, CopyCost = -1 in
329 let isAllocatable = 0 in
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h119 bool isAllocatable() const { return MC->isAllocatable(); } in isAllocatable() function
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td170 let isAllocatable = 0, CopyCost = -1 in {
326 let isAllocatable = 0 in
481 let isAllocatable = 0;
484 let isAllocatable = 0;
488 let isAllocatable = 0;
491 let isAllocatable = 0;
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.td134 let isAllocatable = 0 in {
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMRegisterInfo.td294 let isAllocatable = 0;
345 let isAllocatable = 0;
406 let isAllocatable = 0;
472 let isAllocatable = 0;
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h100 bool isAllocatable() const { return Allocatable; } in isAllocatable() function

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