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Searched refs:irq (Results 1 – 25 of 1334) sorted by relevance

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/freebsd/sys/powerpc/powermac/
H A Dcpcht.c85 int *irq);
87 int irq);
89 int irq, uint64_t *addr, uint32_t *data);
220 int i, nirq, irq; in cpcht_configure_htbridge() local
279 irq = PCIB_READ_CONFIG(dev, b, s, f, ptr + 4, 4); in cpcht_configure_htbridge()
285 irq | HTAPIC_MASK, 4); in cpcht_configure_htbridge()
286 irq = (irq >> 16) & 0xff; in cpcht_configure_htbridge()
288 sc->htirq_map[irq].irq_type = IRQ_HT; in cpcht_configure_htbridge()
289 sc->htirq_map[irq].ht_source = i; in cpcht_configure_htbridge()
290 sc->htirq_map[irq].ht_base = sc->sc_data + in cpcht_configure_htbridge()
[all …]
H A Dhrowpic.c177 hrowpic_toggle_irq(struct hrowpic_softc *sc, int irq, int enable) in hrowpic_toggle_irq() argument
182 KASSERT((irq > 0) && (irq <= HROWPIC_IRQMAX), ("en irq out of range")); in hrowpic_toggle_irq()
187 if (irq == HROWPIC_IRQMAX) in hrowpic_toggle_irq()
194 roffset = HPIC_INT_TO_BANK(irq); in hrowpic_toggle_irq()
195 rbit = HPIC_INT_TO_REGBIT(irq); in hrowpic_toggle_irq()
215 u_int irq; in hrowpic_dispatch() local
225 irq = 0; in hrowpic_dispatch()
226 while (irq < HROWPIC_IRQMAX) { in hrowpic_dispatch()
228 powerpc_dispatch_intr(sc->sc_vector[irq], tf); in hrowpic_dispatch()
230 irq++; in hrowpic_dispatch()
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/freebsd/sys/arm/allwinner/a10/
H A Da10_intc.c96 u_int irq; member
114 a10_intr_eoi(struct a10_aintc_softc *sc, u_int irq) in a10_intr_eoi() argument
117 if (irq != SW_INT_IRQNO_ENMI) in a10_intr_eoi()
126 a10_intr_unmask(struct a10_aintc_softc *sc, u_int irq) in a10_intr_unmask() argument
130 bit = (irq % 32); in a10_intr_unmask()
131 block = (irq / 32); in a10_intr_unmask()
145 a10_intr_mask(struct a10_aintc_softc *sc, u_int irq) in a10_intr_mask() argument
149 bit = (irq % 32); in a10_intr_mask()
150 block = (irq / 32); in a10_intr_mask()
186 u_int irq; in a10_intr() local
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/freebsd/usr.sbin/bhyve/amd64/
H A Dpci_irq.c59 #define IRQ_PERMITTED(irq) (((1U << (irq)) & PERMITTED_IRQS) != 0) argument
117 pci_irq_reserve(int irq) in pci_irq_reserve() argument
120 assert(irq >= 0 && irq < NIRQ_COUNTS); in pci_irq_reserve()
122 assert(irq_counts[irq] == 0 || irq_counts[irq] == IRQ_DISABLED); in pci_irq_reserve()
123 irq_counts[irq] = IRQ_DISABLED; in pci_irq_reserve()
127 pci_irq_use(int irq) in pci_irq_use() argument
130 assert(irq >= 0 && irq < NIRQ_COUNTS); in pci_irq_use()
132 assert(irq_counts[irq] != IRQ_DISABLED); in pci_irq_use()
133 irq_counts[irq]++; in pci_irq_use()
161 pin = pi->pi_lintr.irq.pirq_pin; in pci_irq_assert()
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/freebsd/sys/compat/linuxkpi/common/include/linux/
H A Dinterrupt.h59 request_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, in request_irq() argument
63 return (lkpi_request_irq(NULL, irq, handler, NULL, flags, name, arg)); in request_irq()
67 request_threaded_irq(int irq, irq_handler_t handler, in request_threaded_irq() argument
72 return (lkpi_request_irq(NULL, irq, handler, thread_handler, in request_threaded_irq()
77 devm_request_irq(struct device *dev, int irq, in devm_request_irq() argument
81 return (lkpi_request_irq(dev, irq, handler, NULL, flags, name, arg)); in devm_request_irq()
85 devm_request_threaded_irq(struct device *dev, int irq, in devm_request_threaded_irq() argument
90 return (lkpi_request_irq(dev, irq, handler, thread_handler, in devm_request_threaded_irq()
95 enable_irq(unsigned int irq) in enable_irq() argument
97 return (lkpi_enable_irq(irq)); in enable_irq()
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/freebsd/sys/arm/ti/
H A Daintc.c106 ti_aintc_irq_mask(struct ti_aintc_softc *sc, u_int irq) in ti_aintc_irq_mask() argument
109 aintc_write_4(sc, INTC_MIR_SET(irq >> 5), (1UL << (irq & 0x1F))); in ti_aintc_irq_mask()
113 ti_aintc_irq_unmask(struct ti_aintc_softc *sc, u_int irq) in ti_aintc_irq_unmask() argument
116 aintc_write_4(sc, INTC_MIR_CLEAR(irq >> 5), (1UL << (irq & 0x1F))); in ti_aintc_irq_unmask()
122 uint32_t irq; in ti_aintc_intr() local
126 irq = aintc_read_4(sc, INTC_SIR_IRQ); in ti_aintc_intr()
127 if ((irq & INTC_SIR_SPURIOUS_MASK) != 0) { in ti_aintc_intr()
129 "Spurious interrupt detected (0x%08x)\n", irq); in ti_aintc_intr()
135 irq &= INTC_SIR_ACTIVE_MASK; in ti_aintc_intr()
136 if (intr_isrc_dispatch(&sc->aintc_isrcs[irq].tai_isrc, in ti_aintc_intr()
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H A Dti_pruss.c221 struct ti_pruss_irqsc* irq; in ti_pruss_irq_read() local
227 irq = cdev->si_drv1; in ti_pruss_irq_read()
236 mtx_lock(&irq->sc_mtx); in ti_pruss_irq_read()
238 if (irq->tstamps.ctl.cnt - priv->cnt > TI_TS_ARRAY) in ti_pruss_irq_read()
240 priv->cnt = irq->tstamps.ctl.cnt; in ti_pruss_irq_read()
241 priv->idx = irq->tstamps.ctl.idx; in ti_pruss_irq_read()
242 mtx_unlock(&irq->sc_mtx); in ti_pruss_irq_read()
248 level = irq->tstamps.ctl.idx - idx; in ti_pruss_irq_read()
254 mtx_unlock(&irq->sc_mtx); in ti_pruss_irq_read()
258 error = msleep(irq, &irq->sc_mtx, PCATCH | PDROP, in ti_pruss_irq_read()
[all …]
/freebsd/sys/compat/linuxkpi/common/src/
H A Dlinux_interrupt.c47 unsigned int irq; member
51 lkpi_irq_rid(struct device *dev, unsigned int irq) in lkpi_irq_rid() argument
54 if (irq >= dev->irq_start && irq < dev->irq_end) in lkpi_irq_rid()
55 return (irq - dev->irq_start + 1); in lkpi_irq_rid()
61 lkpi_irq_ent(struct device *dev, unsigned int irq) in lkpi_irq_ent() argument
66 if (irqe->irq == irq) in lkpi_irq_ent()
81 if (irqe->handler(irqe->irq, irqe->arg) == IRQ_WAKE_THREAD && in lkpi_irq_handler()
84 irqe->thread_handler(irqe->irq, irqe->arg); in lkpi_irq_handler()
113 lkpi_request_irq(struct device *xdev, unsigned int irq, in lkpi_request_irq() argument
124 dev = lkpi_pci_find_irq_dev(irq); in lkpi_request_irq()
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/freebsd/sys/arm/arm/
H A Dgic.c131 #define GIC_INTR_ISRC(sc, irq) (&sc->gic_irqs[irq].gi_isrc) argument
167 gic_irq_unmask(struct arm_gic_softc *sc, u_int irq) in gic_irq_unmask() argument
170 gic_d_write_4(sc, GICD_ISENABLER(irq), GICD_I_MASK(irq)); in gic_irq_unmask()
174 gic_irq_mask(struct arm_gic_softc *sc, u_int irq) in gic_irq_mask() argument
177 gic_d_write_4(sc, GICD_ICENABLER(irq), GICD_I_MASK(irq)); in gic_irq_mask()
208 u_int irq, cpu; in arm_gic_init_secondary() local
215 for (irq = 0; irq < sc->nirqs; irq += 4) in arm_gic_init_secondary()
216 gic_d_write_4(sc, GICD_IPRIORITYR(irq), 0); in arm_gic_init_secondary()
219 for (irq = 0; GIC_SUPPORT_SECEXT(sc) && irq < sc->nirqs; irq += 32) { in arm_gic_init_secondary()
220 gic_d_write_4(sc, GICD_IGROUPR(irq), 0); in arm_gic_init_secondary()
[all …]
/freebsd/sys/arm64/vmm/io/
H A Dvgic_v3.c101 uint32_t irq; member
468 struct vgic_v3_irq *irq; in vgic_v3_cpuinit() local
479 irq = &vgic_cpu->private_irqs[irqid]; in vgic_v3_cpuinit()
481 mtx_init(&irq->irq_spinmtx, "VGIC IRQ spinlock", NULL, in vgic_v3_cpuinit()
483 irq->irq = irqid; in vgic_v3_cpuinit()
484 irq->mpidr = hypctx->vmpidr_el2 & GICD_AFF; in vgic_v3_cpuinit()
485 irq->target_vcpu = vcpu_vcpuid(hypctx->vcpu); in vgic_v3_cpuinit()
486 MPASS(irq->target_vcpu >= 0); in vgic_v3_cpuinit()
490 irq->enabled = true; in vgic_v3_cpuinit()
491 irq->config = VGIC_CONFIG_EDGE; in vgic_v3_cpuinit()
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/freebsd/sys/arm64/apple/
H A Dapple_aic.c78 #define AIC_TARGET_CPU(irq) (0x3000 + (irq) * 4) argument
79 #define AIC_SW_SET(irq) (0x4000 + (((irq) >> 5) * 4)) argument
80 #define AIC_SW_CLEAR(irq) (0x4080 + (((irq) >> 5) * 4)) argument
81 #define AIC_MASK_SET(irq) (0x4100 + (((irq) >> 5) * 4)) argument
82 #define AIC_MASK_CLEAR(irq) (0x4180 + (((irq) >> 5) * 4)) argument
83 #define AIC_IRQ_MASK(irq) (1u << ((irq) & 0x1f)) argument
286 struct intr_map_data_fdt *data, u_int *irq, enum apple_aic_irq_type *typep, in apple_aic_map_intr_fdt() argument
315 *irq = data->cells[1]; in apple_aic_map_intr_fdt()
316 if (*irq > sc->sc_nirqs) in apple_aic_map_intr_fdt()
341 u_int irq; in apple_aic_map_intr() local
[all …]
/freebsd/sys/i386/pci/
H A Dpci_pir.c83 int irq);
95 static int pci_pir_valid_irq(struct pci_link *pci_link, int irq);
198 pci_pir_valid_irq(struct pci_link *pci_link, int irq) in pci_pir_valid_irq() argument
201 if (!PCI_INTERRUPT_VALID(irq)) in pci_pir_valid_irq()
203 return (pci_link->pl_irqmask & (1 << irq)); in pci_pir_valid_irq()
311 uint8_t irq, pin; in pci_pir_initial_irqs() local
315 irq = pci_pir_search_irq(entry->pe_bus, entry->pe_device, pin); in pci_pir_initial_irqs()
316 if (irq == PCI_INVALID_IRQ || irq == pci_link->pl_irq) in pci_pir_initial_irqs()
320 if (irq >= NUM_ISA_INTERRUPTS) { in pci_pir_initial_irqs()
323 irq, entry->pe_bus, entry->pe_device, pin + 'A', in pci_pir_initial_irqs()
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/freebsd/sys/riscv/vmm/
H A Dvmm_aplic.c122 struct aplic_irq *irq; in aplic_handle_sourcecfg() local
128 irq = &aplic->irqs[i]; in aplic_handle_sourcecfg()
130 irq->sourcecfg = *val; in aplic_handle_sourcecfg()
132 *val = irq->sourcecfg; in aplic_handle_sourcecfg()
141 struct aplic_irq *irq; in aplic_set_enabled() local
153 irq = &aplic->irqs[i]; in aplic_set_enabled()
156 if ((irq->sourcecfg & SOURCECFG_SM_M) != SOURCECFG_SM_INACTIVE) { in aplic_set_enabled()
158 irq->state |= APLIC_IRQ_STATE_ENABLED; in aplic_set_enabled()
160 irq->state &= ~APLIC_IRQ_STATE_ENABLED; in aplic_set_enabled()
193 struct aplic_irq *irq; in aplic_handle_target() local
[all …]
/freebsd/sys/arm/freescale/imx/
H A Dimx_gpio.c181 u_int irq; in gpio_pic_map_fdt() local
201 irq = daf->cells[0]; in gpio_pic_map_fdt()
202 if (irq >= sc->gpio_npins) { in gpio_pic_map_fdt()
203 device_printf(sc->dev, "Invalid interrupt number %u\n", irq); in gpio_pic_map_fdt()
227 *irqp = irq; in gpio_pic_map_fdt()
237 u_int irq; in gpio_pic_map_gpio() local
239 irq = dag->gpio_pin_num; in gpio_pic_map_gpio()
240 if (irq >= sc->gpio_npins) { in gpio_pic_map_gpio()
241 device_printf(sc->dev, "Invalid interrupt number %u\n", irq); in gpio_pic_map_gpio()
258 *irqp = irq; in gpio_pic_map_gpio()
[all …]
/freebsd/sys/arm64/arm64/
H A Dgic_v3.c306 u_int irq; in gic_v3_attach() local
359 for (irq = 0; irq < sc->gic_nirqs; irq++) { in gic_v3_attach()
362 sc->gic_irqs[irq].gi_irq = irq; in gic_v3_attach()
363 sc->gic_irqs[irq].gi_pol = INTR_POLARITY_CONFORM; in gic_v3_attach()
364 sc->gic_irqs[irq].gi_trig = INTR_TRIGGER_CONFORM; in gic_v3_attach()
366 isrc = &sc->gic_irqs[irq].gi_isrc; in gic_v3_attach()
367 if (irq <= GIC_LAST_SGI) { in gic_v3_attach()
369 INTR_ISRCF_IPI, "%s,i%u", name, irq - GIC_FIRST_SGI); in gic_v3_attach()
370 } else if (irq <= GIC_LAST_PPI) { in gic_v3_attach()
372 INTR_ISRCF_PPI, "%s,p%u", name, irq - GIC_FIRST_PPI); in gic_v3_attach()
[all …]
/freebsd/sys/x86/isa/
H A Delcr.c53 #define ELCR_MASK(irq) (1 << (irq)) argument
93 elcr_read_trigger(u_int irq) in elcr_read_trigger() argument
97 KASSERT(irq <= 15, ("%s: invalid IRQ %u", __func__, irq)); in elcr_read_trigger()
98 if (elcr_status & ELCR_MASK(irq)) in elcr_read_trigger()
109 elcr_write_trigger(u_int irq, enum intr_trigger trigger) in elcr_write_trigger() argument
114 KASSERT(irq <= 15, ("%s: invalid IRQ %u", __func__, irq)); in elcr_write_trigger()
116 new_status = elcr_status | ELCR_MASK(irq); in elcr_write_trigger()
118 new_status = elcr_status & ~ELCR_MASK(irq); in elcr_write_trigger()
122 if (irq >= 8) in elcr_write_trigger()
/freebsd/sys/arm/broadcom/bcm2835/
H A Dbcm2835_intr.c215 int irq, num; in bcm2835_intc_intr() local
219 irq = bcm2835_intc_active_intr(sc); in bcm2835_intc_intr()
220 if (irq == -1) in bcm2835_intc_intr()
222 if (intr_isrc_dispatch(&sc->intc_isrcs[irq].bii_isrc, in bcm2835_intc_intr()
224 bcm_intc_isrc_mask(sc, &sc->intc_isrcs[irq]); in bcm2835_intc_intr()
226 irq); in bcm2835_intc_intr()
257 u_int irq; in bcm_intc_map_intr() local
267 irq = daf->cells[0]; in bcm_intc_map_intr()
272 irq = daf->cells[1]; in bcm_intc_map_intr()
273 if (irq >= BANK1_START) in bcm_intc_map_intr()
[all …]
/freebsd/usr.sbin/bhyve/
H A Dpctestdev.c94 struct inout_port debugexit, ioport, irq; in pctestdev_init() local
139 irq.name = IRQ_NAME; in pctestdev_init()
140 irq.port = IRQ_BASE; in pctestdev_init()
141 irq.size = pincount; in pctestdev_init()
142 irq.flags = IOPORT_F_INOUT; in pctestdev_init()
143 irq.handler = pctestdev_irq_io; in pctestdev_init()
144 irq.arg = NULL; in pctestdev_init()
154 err = register_inout(&irq); in pctestdev_init()
167 (void)unregister_inout(&irq); in pctestdev_init()
239 int irq; in pctestdev_irq_io() local
[all …]
/freebsd/sys/arm/mv/
H A Dmv_ap806_sei.c82 u_int irq; member
116 bit = GICP_SEMR_BIT(sisrc->irq); in mv_ap806_sei_isrc_mask()
118 tmp = RD4(sc, GICP_SEMR(sisrc->irq)); in mv_ap806_sei_isrc_mask()
123 WR4(sc, GICP_SEMR(sisrc->irq), tmp); in mv_ap806_sei_isrc_mask()
132 WR4(sc, GICP_SECR(sisrc->irq), GICP_SECR_BIT(sisrc->irq)); in mv_ap806_sei_isrc_eoi()
161 u_int irq; in mv_ap806_sei_map() local
174 irq = daf->cells[0]; in mv_ap806_sei_map()
176 *irqp = irq; in mv_ap806_sei_map()
186 u_int irq; in mv_ap806_sei_map_intr() local
190 rv = mv_ap806_sei_map(dev, data, &irq); in mv_ap806_sei_map_intr()
[all …]
/freebsd/sys/powerpc/pseries/
H A Dxics.c69 static void xicp_bind(device_t dev, u_int irq, cpuset_t cpumask, void **priv);
108 int irq; member
299 xicp_setup_priv(struct xicp_softc *sc, u_int irq, void **priv) in xicp_setup_priv() argument
317 xicp_bind(device_t dev, u_int irq, cpuset_t cpumask, void **priv) in xicp_bind() argument
325 if (irq == MAX_XICP_IRQS) in xicp_bind()
328 iv = xicp_setup_priv(sc, irq, priv); in xicp_bind()
352 error = rtas_call_method(sc->ibm_set_xive, 3, 1, irq, cpu, in xicp_bind()
356 error = opal_call(OPAL_SET_XIVE, irq, cpu << 2, XICP_PRIORITY); in xicp_bind()
360 panic("Cannot bind interrupt %d to CPU %d", irq, cpu); in xicp_bind()
417 if (sc->intvecs[i].irq == xirr) in xicp_dispatch()
[all …]
/freebsd/sys/riscv/riscv/
H A Dplic.c86 u_int irq; member
159 plic_irq_dispatch(struct plic_softc *sc, u_int irq, in plic_irq_dispatch() argument
164 src = &sc->isrcs[irq]; in plic_irq_dispatch()
167 device_printf(sc->dev, "Stray irq %u detected\n", irq); in plic_irq_dispatch()
199 WR4(sc, PLIC_PRIORITY(src->irq), 0); in plic_disable_intr()
211 WR4(sc, PLIC_PRIORITY(src->irq), 1); in plic_enable_intr()
220 u_int irq, type; in plic_map_intr() local
233 irq = daf->cells[0]; in plic_map_intr()
236 if (irq > sc->ndev) { in plic_map_intr()
267 sc->isrcs[irq].trigtype = type; in plic_map_intr()
[all …]
H A Dintc.c66 u_int irq; member
169 isrcs[i].irq = i; in intc_attach()
190 u_int irq; in intc_disable_intr() local
192 irq = ((struct intc_irqsrc *)isrc)->irq; in intc_disable_intr()
193 if (irq >= INTC_NIRQS) in intc_disable_intr()
194 panic("%s: Unsupported IRQ %u", __func__, irq); in intc_disable_intr()
196 csr_clear(sie, 1ul << irq); in intc_disable_intr()
202 u_int irq; in intc_enable_intr() local
204 irq = ((struct intc_irqsrc *)isrc)->irq; in intc_enable_intr()
205 if (irq >= INTC_NIRQS) in intc_enable_intr()
[all …]
/freebsd/sys/dev/gve/
H A Dgve_utils.c226 struct gve_irq *irq; in gve_free_irqs() local
240 irq = &priv->irq_tbl[i]; in gve_free_irqs()
241 if (irq->res == NULL) in gve_free_irqs()
244 rid = rman_get_rid(irq->res); in gve_free_irqs()
246 rc = bus_teardown_intr(priv->dev, irq->res, irq->cookie); in gve_free_irqs()
252 rid, irq->res); in gve_free_irqs()
257 irq->res = NULL; in gve_free_irqs()
258 irq->cookie = NULL; in gve_free_irqs()
275 struct gve_irq *irq; in gve_alloc_irqs() local
302 irq = &priv->irq_tbl[i]; in gve_alloc_irqs()
[all …]
/freebsd/sys/powerpc/powerpc/
H A Dopenpic.c76 u_int cpu, ipi, irq; in openpic_common_attach() local
186 for (irq = 0; irq < sc->sc_nirq; irq++) { in openpic_common_attach()
187 x = irq; /* irq == vector. */ in openpic_common_attach()
192 openpic_write(sc, OPENPIC_SRC_VECTOR(irq), x); in openpic_common_attach()
209 for (irq = 0; irq < sc->sc_nirq; irq++) in openpic_common_attach()
210 openpic_write(sc, OPENPIC_IDEST(irq), 1 << 0); in openpic_common_attach()
213 for (irq = 0; irq < sc->sc_nirq; irq++) { in openpic_common_attach()
235 openpic_bind(device_t dev, u_int irq, cpuset_t cpumask, void **priv __unused) in openpic_bind() argument
266 openpic_write(sc, OPENPIC_IDEST(irq), mask); in openpic_bind()
270 openpic_config(device_t dev, u_int irq, enum intr_trigger trig, in openpic_config() argument
[all …]
/freebsd/sys/powerpc/mpc85xx/
H A Datpic.c81 static void atpic_ofw_translate_code(device_t, u_int irq, int code,
245 atpic_config(device_t dev, u_int irq, enum intr_trigger trig, in atpic_config() argument
254 uint8_t irq; in atpic_dispatch() local
258 irq = atpic_read(sc, ATPIC_MASTER, 0); in atpic_dispatch()
260 if ((irq & 0x80) == 0) in atpic_dispatch()
263 if (irq == 0x82) { in atpic_dispatch()
265 irq = atpic_read(sc, ATPIC_SLAVE, 0) + 8; in atpic_dispatch()
267 if ((irq & 0x80) == 0) in atpic_dispatch()
271 powerpc_dispatch_intr(sc->sc_vector[irq & 0x0f], tf); in atpic_dispatch()
275 atpic_enable(device_t dev, u_int irq, u_in argument
285 atpic_eoi(device_t dev,u_int irq) atpic_eoi() argument
302 atpic_mask(device_t dev,u_int irq) atpic_mask() argument
317 atpic_unmask(device_t dev,u_int irq) atpic_unmask() argument
332 atpic_ofw_translate_code(device_t dev,u_int irq,int code,enum intr_trigger * trig,enum intr_polarity * pol) atpic_ofw_translate_code() argument
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