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Searched refs:imm16 (Results 1 – 25 of 29) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF1.td313 def : Pat<(brcond (i32 (setcc sFPR32Op:$rs1, sFPR32Op:$rs2, CC)), bb:$imm16),
314 (Br0 (!cast<Instruction>(Instr#_S) sFPR32Op:$rs1, sFPR32Op:$rs2), bb:$imm16)>;
316 def : Pat<(brcond (xor (i32 (setcc sFPR32Op:$rs1, sFPR32Op:$rs2, CC)), 1), bb:$imm16),
317 (Br1 (!cast<Instruction>(Instr#_S) sFPR32Op:$rs1, sFPR32Op:$rs2), bb:$imm16)>;
319 def : Pat<(brcond (i32 (setcc sFPR64Op:$rs1, sFPR64Op:$rs2, CC)), bb:$imm16),
320 (Br0 (!cast<Instruction>(Instr#_D) sFPR64Op:$rs1, sFPR64Op:$rs2), bb:$imm16)>;
322 def : Pat<(brcond (xor (i32 (setcc sFPR64Op:$rs1, sFPR64Op:$rs2, CC)), 1), bb:$imm16),
323 (Br1 (!cast<Instruction>(Instr#_D) sFPR64Op:$rs1, sFPR64Op:$rs2), bb:$imm16)>;
335 def : Pat<(brcond (i32 (setcc sFPR32Op:$rs1, sFPR32Op:$rs2, CC)), bb:$imm16),
336 (Br0 (!cast<Instruction>(Instr#_S) sFPR32Op:$rs2, sFPR32Op:$rs1), bb:$imm16)>;
[all...]
H A DCSKYInstrInfoF2.td299 def : Pat<(brcond (i32 (setcc FPR32Op:$rs1, FPR32Op:$rs2, CC)), bb:$imm16),
300 (Br0 (!cast<Instruction>(Instr#_S) FPR32Op:$rs1, FPR32Op:$rs2), bb:$imm16)>;
302 def : Pat<(brcond (xor (i32 (setcc FPR32Op:$rs1, FPR32Op:$rs2, CC)), 1), bb:$imm16),
303 (Br1 (!cast<Instruction>(Instr#_S) FPR32Op:$rs1, FPR32Op:$rs2), bb:$imm16)>;
305 def : Pat<(brcond (i32 (setcc FPR64Op:$rs1, FPR64Op:$rs2, CC)), bb:$imm16),
306 (Br0 (!cast<Instruction>(Instr#_D) FPR64Op:$rs1, FPR64Op:$rs2), bb:$imm16)>;
308 def : Pat<(brcond (xor (i32 (setcc FPR64Op:$rs1, FPR64Op:$rs2, CC)), 1), bb:$imm16),
309 (Br1 (!cast<Instruction>(Instr#_D) FPR64Op:$rs1, FPR64Op:$rs2), bb:$imm16)>;
338 def : Pat<(brcond (i32 (setcc FPR32Op:$rs1, FPR32Op:$rs2, CC)), bb:$imm16),
339 (Br0 (!cast<Instruction>(Instr#_S) FPR32Op:$rs2, FPR32Op:$rs1), bb:$imm16)>;
[all...]
H A DCSKYInstrFormats.td81 (outs GPR:$rz), (ins GPR:$rx,ImmType:$imm16),
82 !strconcat(op, "\t$rz, $rx, $imm16"), pattern> {
85 bits<16> imm16;
88 let Inst{15 - 0} = imm16;
94 : CSKY32Inst<AddrModeNone, 0x3a, (outs GPR:$rz), (ins ImmType:$imm16),
95 !strconcat(op, "\t$rz, $imm16"),
96 [(set GPR:$rz, ImmType:$imm16)]> {
98 bits<16> imm16;
101 let Inst{15 - 0} = imm16;
111 !strconcat(op, "\t$rz, $imm16"), pattern> {
[all …]
H A DCSKYInstrInfo.td528 [(set GPR:$rz, (or GPR:$rx, uimm16:$imm16))]>;
739 def CMPLEI32 : CSKYPseudo<(outs CARRY:$ca), (ins GPR:$rx, uimm16:$imm16),
740 "cmplei32\t$rx, $imm16", []>;
805 def BR32 : I_16_L<0x0, (outs), (ins br_symbol:$imm16), "br32\t$imm16",
806 [(br bb:$imm16)]>;
808 def BT32 : I_16_L<0x3, (outs), (ins CARRY:$ca, br_symbol:$imm16),
809 "bt32\t$imm16", [(brcond CARRY:$ca, bb:$imm16)]>, Requires<[iHasE2]>;
810 def BF32 : I_16_L<0x2, (outs), (ins CARRY:$ca, br_symbol:$imm16),
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips16InstrFormats.td435 bits<16> imm16;
440 let Inst{26-21} = imm16{10-5};
441 let Inst{20-16} = imm16{15-11};
444 let Inst{4-0} = imm16{4-0};
486 bits<16> imm16;
492 let Inst{26-21} = imm16{10-5};
493 let Inst{20-16} = imm16{15-11};
497 let Inst{4-0} = imm16{4-0};
511 bits<16> imm16;
517 let Inst{26-21} = imm16{10-5};
[all …]
H A DMips16InstrInfo.td151 FEXT_I16<eop, (outs), (ins brtarget:$imm16),
152 !strconcat(asmstr, "\t$imm16"),[], itin>;
160 FEXT_I816<_func, (outs), (ins simm16:$imm16), !strconcat(asmstr, asmstr2),
165 FEXT_I816_ins_base<_func, asmstr, "\t$imm16", itin>;
169 FEXT_I816_ins_base<_func, asmstr, "\t$$sp, $imm16", itin>;
193 FEXT_RI16<_op, (outs CPU16Regs:$rx), (ins simm16:$imm16),
198 FEXT_RI16_ins_base<_op, asmstr, "\t$rx, $imm16", itin>;
202 FEXT_RI16<_op, (outs ), (ins CPU16Regs:$rx, simm16:$imm16),
207 FEXT_RI16R_ins_base<_op, asmstr, "\t$rx, $imm16", itin>;
210 FEXT_RI16_ins_base<_op, asmstr, "\t$rx, $$pc, $imm16", itin>;
[all …]
H A DMipsInstrFormats.td206 bits<16> imm16;
213 let Inst{15-0} = imm16;
234 bits<16> imm16;
241 let Inst{15-0} = imm16;
317 bits<16> imm16;
324 let Inst{15-0} = imm16;
382 bits<16> imm16;
389 let Inst{15-0} = imm16;
503 bits<16> imm16;
510 let Inst{15-0} = imm16;
H A DMicroMipsInstrFormats.td314 bits<16> imm16;
321 let Inst{15-0} = imm16;
327 bits<16> imm16;
334 let Inst{15-0} = imm16;
339 bits<16> imm16;
346 let Inst{15-0} = imm16;
693 bits<16> imm16;
700 let Inst{15-0} = imm16;
H A DMicroMips32r6InstrFormats.td160 bits<16> imm16;
167 let Inst{15-0} = imm16;
405 bits<16> imm16;
412 let Inst{15-0} = imm16;
H A DMipsInstrInfo.td1334 InstSE<(outs RO:$rt), (ins RO:$rs, Od:$imm16),
1335 !strconcat(opstr, "\t$rt, $rs, $imm16"),
1336 [(set RO:$rt, (OpNode RO:$rs, imm_type:$imm16))],
1379 InstSE<(outs RO:$rt), (ins Imm:$imm16), !strconcat(opstr, "\t$rt, $imm16"),
1529 InstSE<(outs GPR32Opnd:$rt), (ins RO:$rs, Od:$imm16),
1530 !strconcat(opstr, "\t$rt, $rs, $imm16"),
1531 [(set GPR32Opnd:$rt, (cond_op RO:$rs, imm_type:$imm16))],
1675 InstSE<(outs), (ins RO:$rs, simm16:$imm16),
1676 !strconcat(opstr, "\t$rs, $imm16"), [], itin, FrmOther, opstr>;
H A DMips64InstrInfo.td501 InstSE<(outs RO:$rt, uimm16:$imm16), (ins),
502 !strconcat(asmstr, "\t$rt, $imm16"), [], itin, FrmFR>;
908 def : MipsPat<(i64 (sext (i32 (add GPR32:$src, immSExt16:$imm16)))),
910 (ADDiu GPR32:$src, immSExt16:$imm16), sub_32)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.td277 def LO : InstRI<subOp, (outs GPR:$Rd), (ins GPR:$Rs1, LoExt:$imm16),
278 !strconcat(AsmStr, "\t$Rs1, $imm16, $Rd"),
281 def HI : InstRI<subOp, (outs GPR:$Rd), (ins GPR:$Rs1, HiExt:$imm16),
282 !strconcat(AsmStr, "\t$Rs1, $imm16, $Rd"),
301 [(set GPR:$Rd, (OpNode GPR:$Rs1, LoExt:$imm16))],
302 [(set GPR:$Rd, (OpNode GPR:$Rs1, HiExt:$imm16))]>;
408 def MOVHI : InstRI<0b000, (outs GPR:$Rd), (ins i32hi16:$imm16),
409 "mov\t$imm16, $Rd",
410 [(set GPR:$Rd, i32hi16:$imm16)]>;
412 def : InstAlias<"mov $imm16, $dst", (ADD_I_LO GPR:$dst, R0, i32lo16z:$imm16)>;
[all …]
H A DLanaiInstrFormats.td94 bits<16> imm16;
102 let Inst{15 - 0} = imm16;
202 bits<16> imm16;
213 let Inst{15 - 0} = imm16;
359 bits<16> imm16;
366 let Inst{15 - 0} = imm16;
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstr64Bit.td347 def R : F2_4<0, 1, (outs), (ins bprtarget16:$imm16, RegCCOp:$rcond, I64Regs:$rs1),
348 "br$rcond $rs1, $imm16", CCPattern>;
349 def RA : F2_4<1, 1, (outs), (ins bprtarget16:$imm16, RegCCOp:$rcond, I64Regs:$rs1),
350 "br$rcond,a $rs1, $imm16", []>;
351 def RNT : F2_4<0, 0, (outs), (ins bprtarget16:$imm16, RegCCOp:$rcond, I64Regs:$rs1),
352 "br$rcond,pn $rs1, $imm16", []>;
353 def RANT : F2_4<1, 0, (outs), (ins bprtarget16:$imm16, RegCCOp:$rcond, I64Regs:$rs1),
354 "br$rcond,a,pn $rs1, $imm16", []>;
358 def : InstAlias<!strconcat(OpcStr, ",pt $rs1, $imm16"),
359 (NAPT I64Regs:$rs1, bprtarget16:$imm16), 0>;
[all …]
H A DSparcInstrFormats.td89 bits<16> imm16;
99 let Inst{21-20} = imm16{15-14};
102 let Inst{13-0} = imm16{13-0};
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.td655 : Fmt2RI16<op, (outs GPR:$rd), (ins GPR:$rj, ImmOpnd:$imm16),
656 "$rd, $rj, $imm16">;
671 : Fmt2RI16<op, (outs), (ins GPR:$rj, GPR:$rd, simm16_lsl2_br:$imm16),
672 "$rj, $rd, $imm16"> {
834 (ins GPR:$rj, simm16_lsl2:$imm16), "$rd, $rj, $imm16">;
1437 : Pat<(brcond (GRLenVT (CondOp GPR:$rj, GPR:$rd)), bb:$imm16),
1438 (Inst GPR:$rj, GPR:$rd, bb:$imm16)>;
1448 : Pat<(brcond (GRLenVT (CondOp GPR:$rd, GPR:$rj)), bb:$imm16),
1449 (InstBcc GPR:$rj, GPR:$rd, bb:$imm16)>;
1472 def PseudoBRIND : Pseudo<(outs), (ins GPR:$rj, simm16_lsl2:$imm16)>,
[all …]
H A DLoongArchInstrFormats.td191 bits<16> imm16;
196 let Inst{25-10} = imm16;
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrFormats.td95 bits<16> imm16;
97 let Inst{23-8} = imm16;
H A DXtensaInstrInfo.td239 let imm16 = label;
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/MIPS64/
H A DEmulateInstructionMIPS64.cpp1069 const uint32_t imm16 = insn.getOperand(2).getImm(); in Emulate_DADDiu() local
1070 int64_t imm = SignedBits(imm16, 15, 0); in Emulate_DADDiu()
1130 uint32_t imm16 = insn.getOperand(2).getImm(); in Emulate_SD() local
1131 uint64_t imm = SignedBits(imm16, 15, 0); in Emulate_SD()
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/MIPS/
H A DEmulateInstructionMIPS.cpp1179 const uint32_t imm16 = insn.getOperand(2).getImm(); in Emulate_ADDiu() local
1180 int64_t imm = SignedBits(imm16, 15, 0); in Emulate_ADDiu()
1227 uint32_t imm16 = insn.getOperand(2).getImm(); in Emulate_SW() local
1228 uint32_t imm = SignedBits(imm16, 15, 0); in Emulate_SW()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp1542 uint16_t imm16; in readImmediate() local
1560 if (consume(insn, imm16)) in readImmediate()
1562 insn->immediates[insn->numImmediatesConsumed] = imm16; in readImmediate()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.td205 def imm16 : Operand<i16> { let EncoderMethod = "encodeImm<AVR::fixup_16, 2>"; }
891 def LDSRdK : F32DM<0b0, (outs GPR8:$rd), (ins imm16:$k), "lds\t$rd, $k",
1058 def STSKRr : F32DM<0b1, (outs), (ins imm16:$k, GPR8:$rd), "sts\t$k, $rd",
1398 : $src, imm16
1448 : $src, imm16
1485 : $src, imm16
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrThumb2.td2912 def t2UDF : T2XI<(outs), (ins imm0_65535:$imm16), IIC_Br, "udf.w\t$imm16",
2913 [(int_arm_undefined imm0_65535:$imm16)]> {
2914 bits<16> imm16;
2918 let Inst{19-16} = imm16{15-12};
2921 let Inst{11-0} = imm16{11-0};
3422 def : T2Pat<(or (and rGPR:$src1, 0xFFFF0000), (srl rGPR:$src2, imm16:$sh)),
3423 (t2PKHTB rGPR:$src1, rGPR:$src2, imm16:$sh)>,
4293 def t2HVC : T2XI <(outs), (ins imm0_65535:$imm16), IIC_Br, "hvc.w\t$imm16", []>,
4295 bits<16> imm16;
4297 let Inst{19-16} = imm16{15-12};
[all …]
H A DARMInstrInfo.td889 /// imm16 predicate - Immediate is exactly 16.
891 def imm16 : Operand<i32>, ImmLeaf<i32, [{ return Imm == 16; }]> {
2352 def UDF : AInoP<(outs), (ins imm0_65535:$imm16), MiscFrm, NoItinerary,
2353 "udf", "\t$imm16", [(int_arm_undefined imm0_65535:$imm16)]> {
2354 bits<16> imm16;
2358 let Inst{19-8} = imm16{15-4};
2360 let Inst{3-0} = imm16{3-0};
4832 (srl GPRnopc:$src2, imm16:$sh)),
4833 (PKHTB GPRnopc:$src1, GPRnopc:$src2, imm16:$sh)>;

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