Home
last modified time | relevance | path

Searched refs:i64 (Results 1 – 25 of 283) sorted by relevance

12345678910>>...12

/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMips64r6InstrInfo.td208 // i64 selects
209 def : MipsPat<(select i64:$cond, i64:$t, i64:$f),
210 (OR64 (SELNEZ64 i64:$t, i64:$cond),
211 (SELEQZ64 i64:$f, i64:$cond))>,
213 def : MipsPat<(select (i32 (seteq i64:$cond, immz)), i64:$t, i64:$f),
214 (OR64 (SELEQZ64 i64:$t, i64:$cond),
215 (SELNEZ64 i64:$f, i64:$cond))>,
217 def : MipsPat<(select (i32 (setne i64:$cond, immz)), i64:$t, i64:$f),
218 (OR64 (SELNEZ64 i64:$t, i64:$cond),
219 (SELEQZ64 i64:$f, i64:$cond))>,
[all …]
H A DMips64InstrInfo.td23 def immSExt10_64 : PatLeaf<(i64 imm),
26 def immZExt16_64 : PatLeaf<(i64 imm),
29 def immZExt5_64 : ImmLeaf<i64, [{ return Imm == (Imm & 0x1f); }]>;
43 if (N->getValueType(0) == MVT::i64) {
53 if (N->getValueType(0) == MVT::i64) {
645 // Materialize i64 constants.
646 defm : MaterializeImms<i64, ZERO_64, DADDiu, LUi64, ORi64>, ISA_MIPS3, GPR_64;
648 def : MipsPat<(i64 immZExt32Low16Zero:$imm),
651 def : MipsPat<(i64 immZExt32:$imm),
656 def : MipsPat<(i64 (extloadi1 addr:$src)), (LB64 addr:$src)>, ISA_MIPS3,
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstr64Bit.td18 // The same integer registers are used for i32 and i64 values.
21 def : Pat<(i64 (anyext i32:$val)), (COPY_TO_REGCLASS $val, I64Regs)>;
22 def : Pat<(i32 (trunc i64:$val)), (COPY_TO_REGCLASS $val, IntRegs)>;
39 def : Pat<(i64 (zext i32:$val)), (SRLri $val, 0)>;
40 def : Pat<(i64 (sext i32:$val)), (SRAri $val, 0)>;
42 def : Pat<(i64 (and i64:$val, 0xffffffff)), (SRLri $val, 0)>;
43 def : Pat<(i64 (sext_inreg i64:$val, i32)), (SRAri $val, 0)>;
45 defm SLLX : F3_S<"sllx", 0b100101, 1, shl, i64, shift_imm6, I64Regs>;
46 defm SRLX : F3_S<"srlx", 0b100110, 1, srl, i64, shift_imm6, I64Regs>;
47 defm SRAX : F3_S<"srax", 0b100111, 1, sra, i64, shift_imm6, I64Regs>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrIntrinsicVL.gen.td1 def : Pat<(int_ve_vl_vld_vssl i64:$sy, i64:$sz, i32:$vl), (VLDrrl i64:$sy, i64:$sz, i32:$vl)>;
2 def : Pat<(int_ve_vl_vld_vssvl i64:$sy, i64:$sz, v256f64:$pt, i32:$vl), (VLDrrl_v i64:$sy, i64:$sz,…
3 def : Pat<(int_ve_vl_vld_vssl simm7:$I, i64:$sz, i32:$vl), (VLDirl (LO7 $I), i64:$sz, i32:$vl)>;
4 def : Pat<(int_ve_vl_vld_vssvl simm7:$I, i64:$sz, v256f64:$pt, i32:$vl), (VLDirl_v (LO7 $I), i64:$s…
5 def : Pat<(int_ve_vl_vldnc_vssl i64:$sy, i64:$sz, i32:$vl), (VLDNCrrl i64:$sy, i64:$sz, i32:$vl)>;
6 def : Pat<(int_ve_vl_vldnc_vssvl i64:$sy, i64:$sz, v256f64:$pt, i32:$vl), (VLDNCrrl_v i64:$sy, i64:…
7 def : Pat<(int_ve_vl_vldnc_vssl simm7:$I, i64:$sz, i32:$vl), (VLDNCirl (LO7 $I), i64:$sz, i32:$vl)>;
8 def : Pat<(int_ve_vl_vldnc_vssvl simm7:$I, i64:$sz, v256f64:$pt, i32:$vl), (VLDNCirl_v (LO7 $I), i6…
9 def : Pat<(int_ve_vl_vldu_vssl i64:$sy, i64:$sz, i32:$vl), (VLDUrrl i64:$sy, i64:$sz, i32:$vl)>;
10 def : Pat<(int_ve_vl_vldu_vssvl i64:$sy, i64:$sz, v256f64:$pt, i32:$vl), (VLDUrrl_v i64:$sy, i64:$s…
[all …]
H A DVVPInstrPatternsVec.td26 (i64 simm7:$stride), (MaskVT true_mask), i32:$avl),
32 i64:$stride, (MaskVT true_mask), i32:$avl),
38 (i64 simm7:$stride), MaskVT:$mask, i32:$avl),
44 i64:$stride, MaskVT:$mask, i32:$avl),
49 defm : VectorStore<v256f64, i64, v256i1, "VST", "VST">;
50 defm : VectorStore<v256i64, i64, v256i1, "VST", "VST">;
51 defm : VectorStore<v256f32, i64, v256i1, "VSTU", "VSTU">;
52 defm : VectorStore<v256i32, i64, v256i1, "VSTL", "VSTL">;
59 PtrVT:$addr, (i64 simm7:$stride),
65 PtrVT:$addr, i64:$stride,
[all …]
H A DVECallingConv.td31 // Promote i1/i8/i16/i32 arguments to i64.
32 CCIfType<[i1, i8, i16, i32], CCPromoteToType<i64>>,
34 // Convert float arguments to i64 with padding.
39 CCIfType<[f32], CCBitConvertToType<i64>>,
43 CCIfType<[i64, f64],
62 // Promote i1/i8/i16/i32 arguments to i64.
63 CCIfType<[i1, i8, i16, i32], CCPromoteToType<i64>>,
65 // Convert float arguments to i64 with padding.
70 CCIfType<[f32], CCBitConvertToType<i64>>,
79 // Promote i1/i8/i16/i32 return values to i64.
[all …]
H A DVEInstrInfo.td429 def SDT_SPCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i64>,
430 SDTCisVT<1, i64> ]>;
431 def SDT_SPCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i64>,
432 SDTCisVT<1, i64> ]>;
439 def SDT_SPCall : SDTypeProfile<0, -1, [SDTCisVT<0, i64>]>;
732 [(set i64:$sx, (OpNode Ty:$sy, i64:$sz, i64:$sd,
738 [(set i64:$sx, (OpNode (Ty immOp:$sy), i64:$sz, i64:$sd,
744 [(set i64:$sx, (OpNode Ty:$sy, (i64 mimm:$sz), i64:$sd,
750 [(set i64:$sx, (OpNode (Ty immOp:$sy), (i64 mimm:$sz), i64:$sd,
1036 defm LD : LOADm<"ld", 0x01, I64, i64, load>;
[all …]
/freebsd/sys/contrib/openzfs/module/icp/asm-arm/sha2/
H A Dsha512-armv7.S517 vadd.i64 d16,d30 @ h+=Maj from the past
532 vadd.i64 d27,d29,d23
535 vadd.i64 d27,d26
537 vadd.i64 d28,d0
542 vadd.i64 d27,d28
545 vadd.i64 d19,d27
546 vadd.i64 d30,d27
547 @ vadd.i64 d23,d30
554 vadd.i64 d23,d30 @ h+=Maj from the past
569 vadd.i64 d27,d29,d22
[all …]
/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/aggs/
H A Dtst.signedkeyspos.d98 @i64["cat", (long long)-2] = sum(-2);
99 @i64["bear", (long long)-2] = sum(-22);
100 @i64["dog", (long long)-2] = sum(-222);
101 @i64["cat", (long long)-1] = sum(-1);
102 @i64["bear", (long long)-1] = sum(-11);
103 @i64["dog", (long long)-1] = sum(-111);
104 @i64["cat", (long long)0] = sum(0);
105 @i64["bear", (long long)0] = sum(10);
106 @i64["dog", (long long)0] = sum(100);
107 @i64["cat", (long long)1] = sum(1);
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstr64Bit.td17 def s16imm64 : Operand<i64> {
24 def u16imm64 : Operand<i64> {
31 def s17imm64 : Operand<i64> {
44 def tlsreg : Operand<i64> {
48 def tlsgd : Operand<i64> {}
49 def tlscall : Operand<i64> {
131 "bla $LI", IIC_BrB, [(PPCcall (i64 imm:$LI))]>;
145 [(PPCcall_nop (i64 imm:$LI))]>;
188 "bla $LI", IIC_BrB, [(PPCcall_rm (i64 imm:$LI))]>;
196 [(PPCcall_nop_rm (i64 imm:$LI))]>;
[all …]
H A DPPCInstrVSX.td1295 [(set i64:$RA, (PPCmfvsr f64:$XT))]>,
1313 [(set f64:$XT, (PPCmtvsra i64:$RA))]>,
1696 [(set v4i32:$XT, (int_ppc_vsx_lxvl addr:$addr, i64:$RB))]>;
1699 [(set v4i32:$XT, (int_ppc_vsx_lxvll addr:$addr, i64:$RB))]>;
1741 i64:$RB)]>;
1746 i64:$RB)]>;
1814 // Output dag used to bitcast f32 to i32 and f64 to i64
1817 dag DblToLong = (i64 (MFVSRD $A));
1832 dag ZELi8i64 = (i64 (zextloadi8 ForceXForm:$src));
1834 dag SELi8i64 = (i64 (sext_inreg (extloadi8 ForceXForm:$src), i8));
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrAtomics.td102 defm : WaitPat<i64, int_wasm_memory_atomic_wait64, "MEMORY_ATOMIC_WAIT64">;
127 defm ATOMIC_LOAD_I64 : AtomicLoad<I64, "i64.atomic.load", 0x11>;
131 defm : LoadPat<i64, atomic_load_64, "ATOMIC_LOAD_I64">;
137 defm ATOMIC_LOAD8_U_I64 : AtomicLoad<I64, "i64.atomic.load8_u", 0x14>;
138 defm ATOMIC_LOAD16_U_I64 : AtomicLoad<I64, "i64.atomic.load16_u", 0x15>;
139 defm ATOMIC_LOAD32_U_I64 : AtomicLoad<I64, "i64.atomic.load32_u", 0x16>;
146 // Unlike regular loads, extension to i64 is handled differently than i32.
147 // i64 (zext (i8 (atomic_load_8))) gets legalized to
148 // i64 (and (i64 (anyext (i32 (atomic_load_8)))), 255)
153 (i64 (zext (i32 (atomic_load_8 node:$addr))))>;
[all …]
H A DWebAssemblyInstrMemory.td18 // WebAssembly has i8/i16/i32/i64/f32/f64 memory types, but doesn't have i8/i16
34 def AddrOps64 : ComplexPattern<i64, 2, "SelectAddrOperands64">;
59 defm LOAD_I64 : WebAssemblyLoad<I64, "i64.load", 0x29, []>;
68 defm LOAD8_S_I64 : WebAssemblyLoad<I64, "i64.load8_s", 0x30, []>;
69 defm LOAD8_U_I64 : WebAssemblyLoad<I64, "i64.load8_u", 0x31, []>;
70 defm LOAD16_S_I64 : WebAssemblyLoad<I64, "i64.load16_s", 0x32, []>;
71 defm LOAD16_U_I64 : WebAssemblyLoad<I64, "i64.load16_u", 0x33, []>;
72 defm LOAD32_S_I64 : WebAssemblyLoad<I64, "i64.load32_s", 0x34, []>;
73 defm LOAD32_U_I64 : WebAssemblyLoad<I64, "i64.load32_u", 0x35, []>;
96 defm : LoadPat<i64, load, "LOAD_I64">;
[all …]
H A DWebAssemblyInstrConv.td21 "i64.extend_i32_s\t$dst, $src", "i64.extend_i32_s",
25 "i64.extend_i32_u\t$dst, $src", "i64.extend_i32_u",
39 "i64.extend8_s\t$dst, $src", "i64.extend8_s",
43 "i64.extend16_s\t$dst, $src", "i64.extend16_s",
47 "i64.extend32_s\t$dst, $src", "i64.extend32_s",
54 def : Pat<(i64 (anyext I32:$src)), (I64_EXTEND_U_I32 I32:$src)>;
70 "i64.trunc_sat_f32_s\t$dst, $src",
71 "i64.trunc_sat_f32_s", 0xfc04>,
75 "i64.trunc_sat_f32_u\t$dst, $src",
76 "i64.trunc_sat_f32_u", 0xfc05>,
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.td30 def SDT_BPFMEMCPY : SDTypeProfile<0, 4, [SDTCisVT<0, i64>,
31 SDTCisVT<1, i64>,
32 SDTCisVT<2, i64>,
33 SDTCisVT<3, i64>]>;
76 def calltarget : Operand<i64>;
78 def u64imm : Operand<i64> {
86 def gpr_or_imm : Operand<i64>;
88 def i64immSExt32 : PatLeaf<(i64 imm),
92 def i64immZExt32 : PatLeaf<(i64 imm),
96 return CurDAG->getTargetConstant(N->getZExtValue(), SDLoc(N), MVT::i64);
[all …]
H A DBPFCallingConv.td14 def RetCC_BPF64 : CallingConv<[CCIfType<[i64], CCAssignToReg<[R0]>>]>;
18 // Promote i8/i16/i32 args to i64
19 CCIfType<[ i8, i16, i32 ], CCPromoteToType<i64>>,
22 CCIfType<[i64], CCAssignToReg<[ R1, R2, R3, R4, R5 ]>>,
31 CCIfType<[i64], CCAssignToRegWithShadow<[R0], [W0]>>
36 // Promote i8/i16/i32 args to i64
41 CCIfType<[i64], CCAssignToRegWithShadow<[R1, R2, R3, R4, R5],
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZOperands.td170 // These all create MVT::i64 nodes to ensure the value is not sign-extended
177 return CurDAG->getTargetConstant(Value, SDLoc(N), MVT::i64);
183 return CurDAG->getTargetConstant(Value, SDLoc(N), MVT::i64);
189 return CurDAG->getTargetConstant(Value, SDLoc(N), MVT::i64);
195 return CurDAG->getTargetConstant(Value, SDLoc(N), MVT::i64);
201 return CurDAG->getTargetConstant(Value, SDLoc(N), MVT::i64);
207 return CurDAG->getTargetConstant(Value, SDLoc(N), MVT::i64);
213 return CurDAG->getTargetConstant(Value, SDLoc(N), MVT::i64);
218 return CurDAG->getTargetConstant(Value, SDLoc(N), MVT::i64);
224 MVT::i64);
[all...]
H A DSystemZCallingConv.td36 // Promote i32 to i64 if it has an explicit extension type.
37 CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
40 CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R9D]>>>,
47 CCIfType<[i64], CCAssignToReg<[R2D, R3D, R4D, R5D]>>,
69 CCIfType<[i64], CCAssignToReg<[R7D, R8D, R10D, R11D, R12D, R13D,
93 // Promote i32 to i64 if it has an explicit extension type.
97 CCIfType<[i32], CCIfExtend<CCPromoteToType<i64>>>,
100 CCIfSwiftSelf<CCIfType<[i64], CCAssignToReg<[R10D]>>>,
103 CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R9D]>>>,
106 // and pass i64 pointer
[all...]
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsLoongArch.td24 // or i64 respectively:
28 // i64 @llvm.<name>.i32.<p>(any*, i64, i64, i64 imm);
34 // i64 @llvm.<name>.i64.<p>(any*, i64, i64, i64, i6
[all...]
H A DIntrinsicsVEVL.gen.td1 …ltin<"__builtin_ve_vl_vld_vssl">, Intrinsic<[LLVMType<v256f64>], [LLVMType<i64>, llvm_ptr_ty, LLVM…
2 …tin<"__builtin_ve_vl_vld_vssvl">, Intrinsic<[LLVMType<v256f64>], [LLVMType<i64>, llvm_ptr_ty, LLVM…
3 …in<"__builtin_ve_vl_vldnc_vssl">, Intrinsic<[LLVMType<v256f64>], [LLVMType<i64>, llvm_ptr_ty, LLVM…
4 …n<"__builtin_ve_vl_vldnc_vssvl">, Intrinsic<[LLVMType<v256f64>], [LLVMType<i64>, llvm_ptr_ty, LLVM…
5 …tin<"__builtin_ve_vl_vldu_vssl">, Intrinsic<[LLVMType<v256f64>], [LLVMType<i64>, llvm_ptr_ty, LLVM…
6 …in<"__builtin_ve_vl_vldu_vssvl">, Intrinsic<[LLVMType<v256f64>], [LLVMType<i64>, llvm_ptr_ty, LLVM…
7 …n<"__builtin_ve_vl_vldunc_vssl">, Intrinsic<[LLVMType<v256f64>], [LLVMType<i64>, llvm_ptr_ty, LLVM…
8 …<"__builtin_ve_vl_vldunc_vssvl">, Intrinsic<[LLVMType<v256f64>], [LLVMType<i64>, llvm_ptr_ty, LLVM…
9 …n<"__builtin_ve_vl_vldlsx_vssl">, Intrinsic<[LLVMType<v256f64>], [LLVMType<i64>, llvm_ptr_ty, LLVM…
10 …<"__builtin_ve_vl_vldlsx_vssvl">, Intrinsic<[LLVMType<v256f64>], [LLVMType<i64>, llvm_ptr_ty, LLVM…
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.td31 CCIfType<[iPTR], CCBitConvertToType<i64>>,
56 CCIfInReg<CCIfType<[i64],
57 CCIfSRet<CCIfType<[i64], CCAssignToReg<[X0, X1]>>>>>,
59 CCIfSRet<CCIfType<[i64], CCAssignToReg<[X8]>>>,
66 CCIfSwiftSelf<CCIfType<[i64], CCAssignToReg<[X20]>>>,
69 CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[X21]>>>,
73 CCIfSwiftAsync<CCIfType<[i64], CCAssignToReg<[X22]>>>,
82 CCPassIndirect<i64>>,
87 CCPassIndirect<i64>>,
89 // Handle i1, i8, i16, i32, i64, f32, f64 and v2f64 by passing in registers,
[all …]
/freebsd/stand/ficl/
H A Dmath64.h57 void i64Push(FICL_STACK *pStack, DPINT i64);
74 #define i64Extend(i64) (i64).hi = ((i64).lo < 0) ? -1L : 0 argument
75 #define m64CastIU(i64) (*(DPUNS *)(&(i64))) argument
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.td71 def i64 : VTInt<64, 8>; // 64-bit integer value
148 def v1i64 : VTVec<1, i64, 77>; // 1 x i64 vector value
149 def v2i64 : VTVec<2, i64, 78>; // 2 x i64 vector value
150 def v3i64 : VTVec<3, i64, 79>; // 3 x i64 vector value
151 def v4i64 : VTVec<4, i64, 80>; // 4 x i64 vector value
152 def v8i64 : VTVec<8, i64, 81>; // 8 x i64 vector value
153 def v16i64 : VTVec<16, i64, 82>; // 16 x i64 vector value
154 def v32i64 : VTVec<32, i64, 83>; // 32 x i64 vector value
155 def v64i64 : VTVec<64, i64, 84>; // 64 x i64 vector value
156 def v128i64 : VTVec<128, i64, 85>; // 128 x i64 vector value
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZb.td592 def : Pat<(i64 (ctpop (i64 (zexti32 (i64 GPR:$rs1))))), (CPOPW GPR:$rs1)>;
594 def : Pat<(i64 (riscv_absw GPR:$rs1)),
614 def : PatGpr<bswap, REV8_RV64, i64>;
637 def : Pat<(i64 (or (zexti32 (i64 GPR:$rs1)), (shl GPR:$rs2, (i64 32)))),
640 def : Pat<(binop_allwusers<or> (shl GPR:$rs2, (i64 16)),
641 (zexti16 (i64 GPR:$rs1))),
643 def : Pat<(i64 (or (sext_inreg (shl GPR:$rs2, (i64 16)), i32),
644 (zexti16 (i64 GPR:$rs1)))),
651 def : Pat<(i64 (and GPR:$rs, 0xFFFF)), (ZEXT_H_RV64 GPR:$rs)>;
656 def : Pat<(i64 (and GPR:$rs, 0xFFFF)), (PACKW GPR:$rs, (XLenVT X0))>;
[all …]
/freebsd/sys/contrib/openzfs/tests/zfs-tests/cmd/
H A Dereports.c83 uint64_t i64 = 0; in print_ereport_line() local
110 (void) nvpair_value_int64(nvp, (void *)&i64); in print_ereport_line()
111 (void) printf("0x%06llx", (u_longlong_t)i64); in print_ereport_line()
115 (void) nvpair_value_uint64(nvp, &i64); in print_ereport_line()
118 (void) printf("0x%010llx", (u_longlong_t)i64); in print_ereport_line()
120 (void) printf("0x%06llx", (u_longlong_t)i64); in print_ereport_line()

12345678910>>...12