Searched refs:hasV6Ops (Results 1 – 11 of 11) sorted by relevance
137 return hasV6Ops() && hasARMOps() && !isTargetWindows(); in isXRaySupported()437 if (!hasV6Ops()) in useFastISel()
17 def HasV6 : Predicate<"Subtarget->hasV6Ops()">,19 def NoV6 : Predicate<"!Subtarget->hasV6Ops()">;
53 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) || in copyPhysReg()
277 return HasDataBarrier || (hasV6Ops() && !isThumb()); in hasAnyDataBarrier()
2688 bool hasV6Ops = Subtarget->hasV6Ops(); in ARMEmitIntExt() local2692 bool isSingleInstr = isSingleInstrTbl[Bitness][isThumb2][hasV6Ops][isZExt]; in ARMEmitIntExt()
1171 if (Subtarget->isThumb1Only() || !Subtarget->hasV6Ops() in ARMTargetLowering()1221 if (!Subtarget->hasV6Ops()) in ARMTargetLowering()1376 (!Subtarget->isMClass() && Subtarget->hasV6Ops())) { in ARMTargetLowering()1403 if (!Subtarget->hasV6Ops()) { in ARMTargetLowering()1605 if (Subtarget->hasV6Ops()) in ARMTargetLowering()1610 if ((!Subtarget->isThumb() && Subtarget->hasV6Ops()) || in ARMTargetLowering()1960 (Subtarget->hasV6Ops() && !Subtarget->isMClass() ? Align(8) : Align(4)); in shouldAlignPointerArgs()4277 assert(Subtarget->hasV6Ops() && !Subtarget->isThumb() && in LowerATOMIC_FENCE()5082 if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP() || Subtarget->isThumb1Only()) in LowerADDSUBSAT()5433 if ((!Subtarget->isThumb() && Subtarget->hasV6Ops()) || Subtarget->isThumb2()) in LowerSELECT_CC()[all …]
3949 Subtarget->hasV6Ops() ? ARM::UMLAL : ARM::UMLALv5, dl, in Select()3968 Subtarget->hasV6Ops() ? ARM::SMLAL : ARM::SMLALv5, dl, in Select()3974 if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP()) in Select()
742 !STI->hasV6Ops()) { in CreateLoadStoreMulti()
442 if (Inst && ((ST->hasV6Ops() && !ST->isThumb()) || ST->isThumb2()) && in getIntImmCostInst()
4848 if (MI.getOpcode() == ARM::tMOVr && !Subtarget.hasV6Ops()) { in verifyInstruction()
545 bool hasV6Ops() const { in hasV6Ops() function in __anon6be9c9a00111::ARMAsmParser11152 else if (Opc == ARM::tMOVr && !hasV6Ops() && in checkTargetMatchPredicate()