| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 91 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicCmpSwapSubword()
92 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicCmpSwapSubword()
93 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwapSubword()
94 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicCmpSwapSubword()
96 LL = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::LL64_R6 : Mips::LL_R6) in expandAtomicCmpSwapSubword()
98 SC = STI->hasMips32r6() ? (ArePtrs64bit ? Mips::SC64_R6 : Mips::SC_R6) in expandAtomicCmpSwapSubword()
217 LL = STI->hasMips32r6() ? Mips::LL_MMR6 : Mips::LL_MM; in expandAtomicCmpSwap()
218 SC = STI->hasMips32r6() ? Mips::SC_MMR6 : Mips::SC_MM; in expandAtomicCmpSwap()
219 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwap()
220 BEQ = STI->hasMips32r6() ? Mips::BEQC_MMR6 : Mips::BEQ_MM; in expandAtomicCmpSwap()
[all …]
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| H A D | MipsSubtarget.cpp | 146 if (hasMips32r6()) { in MipsSubtarget()
204 if (!hasMips32r6() && hasCRC() && !CRCWarningPrinted) { in MipsSubtarget()
209 if (!hasMips32r6() && hasGINV() && !GINVWarningPrinted) { in MipsSubtarget()
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| H A D | MipsSubtarget.h | 273 bool hasMips32r6() const { in hasMips32r6() function
318 return inMicroMipsMode() && hasMips32r6(); in inMicroMips32r6Mode()
379 return hasMips32r6() && !StrictAlign; in systemSupportsUnalignedAccess()
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| H A D | MipsBranchExpansion.cpp | 381 bool HasR6 = ABI.IsN64() ? STI->hasMips64r6() : STI->hasMips32r6(); in buildProperJumpMI()
433 STI->hasMips32r6() in expandToLongBranch()
504 if (STI->hasMips32r6()) { in expandToLongBranch()
615 if (STI->hasMips32r6()) { in expandToLongBranch()
663 if (STI->hasMips32r6() && TII->isBranchOffsetInRange(Mips::BC, I.Offset)) { in expandToLongBranch()
782 if (!STI->hasMips32r6() || STI->inMicroMipsMode()) in handleForbiddenSlot()
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| H A D | MipsSERegisterInfo.cpp | 114 if (Subtarget.hasMips32r6()) in getLoadStoreOffsetSizeInBits()
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| H A D | MipsInstrInfo.cpp | 70 Subtarget.hasMips32r6() ? Mips::SLL_MMR6 : Mips::SLL_MM; in insertNop()
479 if (Subtarget.hasMips32r6() && (I->getNumOperands() > 1) && in getEquivalentCompactForm()
488 if (Subtarget.hasMips32r6() || canUseShortMicroMipsCTI) { in getEquivalentCompactForm()
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| H A D | MipsRegisterInfo.cpp | 101 return Subtarget.hasMips32r6() ? CSR_Interrupt_32R6_SaveList in getCalleeSavedRegs()
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| H A D | MipsDelaySlotFiller.cpp | 616 !(InMicroMipsMode && STI.hasMips32r6())) { in runOnMachineBasicBlock()
671 (STI.hasMips32r6() && MipsCompactBranchPolicy != CB_Never)) && in runOnMachineBasicBlock()
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| H A D | MipsISelLowering.cpp | 307 if (Subtarget.hasMips32r6()) in MipsTargetLowering()
364 if (Subtarget.hasMips32r6()) { in MipsTargetLowering()
557 !Subtarget.hasMips32r6() && !Subtarget.inMips16Mode() && in createFastISel()
1075 if (Subtarget.hasMips32() && !Subtarget.hasMips32r6() && in performSUBCombine()
1090 if (Subtarget.hasMips32() && !Subtarget.hasMips32r6() && in performADDCombine()
2053 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerBRCOND()
2072 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerSELECT()
2084 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerSETCC()
4797 if (Subtarget.hasMips32r6() || Subtarget.hasMips64r6()) { in emitLDR_W()
4843 if (Subtarget.hasMips32r6() || Subtarget.hasMips64r6()) { in emitLDR_D()
[all …]
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| H A D | MicroMipsSizeReduction.cpp | 781 Subtarget->hasMips32r6()) in runOnMachineFunction()
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| H A D | MipsSEISelLowering.cpp | 200 if (Subtarget.hasMips32r6()) { in MipsSETargetLowering()
224 if (Subtarget.hasMips32r6()) { in MipsSETargetLowering()
407 if(!Subtarget.hasMips32r6()) in lowerSELECT()
433 } else if (Subtarget.hasMips32r6()) { in allowsMisalignedMemoryAccesses()
1264 assert(!Subtarget.hasMips32r6()); in lowerMulDiv()
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| H A D | MipsAsmPrinter.cpp | 122 } else if (Subtarget->hasMips32r6()) { in emitPseudoIndirectBranch()
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| H A D | MipsSEISelDAGToDAG.cpp | 1433 } else if (Subtarget->hasMips32r6()) { in SelectInlineAsmMemoryOperand()
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| H A D | MipsInstrInfo.td | 183 def HasMips32r6 : Predicate<"Subtarget->hasMips32r6()">,
185 def NotMips32r6 : Predicate<"!Subtarget->hasMips32r6()">,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsABIFlagsSection.h | 98 if (P.hasMips32r6()) in setISALevelAndRevisionFromPredicates()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 54 bool hasMips32r6() const { in hasMips32r6() function in __anon9e9369d20111::MipsDisassembler
1174 if (hasMips32r6()) { in getInstruction()
1201 if (hasMips32r6()) { in getInstruction()
1259 if (hasMips32r6() && isGP64()) { in getInstruction()
1268 if (hasMips32r6() && isPTR64()) { in getInstruction()
1277 if (hasMips32r6()) { in getInstruction()
2362 if (static_cast<const MipsDisassembler*>(Decoder)->hasMips32r6()) in DecodeMovePOperands()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 665 bool hasMips32r6() const { in hasMips32r6() function in __anona2e40b320211::MipsAsmParser
1996 if (hasMips32r6() && Opcode == Mips::SSNOP) { in processInstruction()
2715 JalrInst.setOpcode(hasMips32r6() ? Mips::JALRC16_MMR6 : Mips::JALR16_MM); in expandJalWithRegs()
3657 Inst.setOpcode(hasMips32r6() ? Mips::BC16_MMR6 : Mips::B16_MM); in expandUncondBranchMMPseudo()
3950 if (inMicroMipsMode() && hasMips32r6()) in expandLoadStoreMultiple()
4444 if (hasMips32r6() || hasMips64r6()) { in expandUlh()
4496 if (hasMips32r6() || hasMips64r6()) { in expandUsh()
4547 if (hasMips32r6() || hasMips64r6()) { in expandUxw()
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